Just-in-time component-wise power and thermal modeling
Article No.: 2, Pages 1 - 8
Abstract
As computer systems increasingly focus on balancing the performance and power efficiency of software applications together with temperature variations of the machine, they need to understand how software applications utilize the various architecture components differently. This paper develops a power and temperature modeling framework to provide such timely feedback, which can then be used to support a dynamic optimization system to attain better energy efficiency for applications. In particular, we present a framework that combines McPAT [17], a cycle accurate architecture simulation model, with runtime hardware performance counter statistics, to attain component-wise power consumption breakdown of applications while running at GHz speed. Our framework is able to consistently achieve 98% accuracy when compared to the actual system-level power consumption measured using a real-time power meter [1]. Finally, we present a preliminary study to demonstrate the potential of using our framework to support the optimizations of applications for better energy efficiency.
References
[1]
Watts up? Pro (http://www.wattsupmeters.com).
[2]
Encyclopedia of measurement and Statistics. Sage Publications Ltd., London:, 2007. Includes index and bibliographical reference.
[3]
D. H. Bailey, E. Barszcz, J. T. Barton, D. S. Browning, R. L. Carter, R. A. Fatoohi, P. O. Frederickson, T. A. Lasinski, H. D. Simon, V. Venkatakrishnan, and S. K. Weeratunga. The NAS parallel benchmarks. Technical report, The International Journal of Supercomputer Applications, 1991.
[4]
N. Binkert, B. Beckmann, G. Black, S. K. Reinhardt, A. Saidi, A. Basu, J. Hestness, D. R. Hower, T. Krishna, S. Sardashti, R. Sen, K. Sewell, M. Shoaib, N. Vaish, M. D. Hill, and D. A. Wood. The gem5 simulator. SIGARCH Comput. Archit. News, 39(2): 1--7, Aug. 2011.
[5]
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: a framework for architectural-level power analysis and optimizations. In Proceedings of the 27th annual international symposium on Computer architecture, ISCA '00, pages 83--94, New York, NY, USA, 2000. ACM.
[6]
G. Contreras and M. Martonosi. Power prediction for Intel XScale processors using performance monitoring unit events. In Proceedings of the 2005 international symposium on Low power electronics and design, pages 221--226, New York, NY, USA, 2005. ACM.
[7]
J. Dongarra, P. Luszczek, and A. Petitet. The LINPACK benchmark: past, present and future. Concurrency and Computation: Practice and Experience, 15(9): 803, 2003.
[8]
B. Goel, S. A. McKee, R. Gioiosa, K. Singh, M. Bhadauria, and M. Cesati. Portable, scalable, per-core power estimation for intelligent resource management. In Green Computing Conference, pages 135--146. IEEE, 2010.
[9]
R. Gonzales and M. Horowitz. Energy dissipation in general purpose processors. IEEE Journal of Solid State Circuits, 31: 1277--1284, 1995.
[10]
W. Huang, S. Ghosh, S. Velusamy, K. Sankaranarayanan, K. Skadron, and M. R. Stan. Hotspot: A compact thermal modeling methodology for early-stage VLSI design. IEEE Trans. Very Large Scale Integr. Syst., 14(5): 501, May 2006.
[11]
W. Huang, C. Lefurgy, W. Kuk, A. Buyuktosunoglu, M. Floyd, K. Rajamani, M. Allen-Ware, and B. Brock. Accurate fine-grained processor power proxies. In Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-45, pages 224--234, Washington, DC, USA, 2012. IEEE Computer Society.
[12]
C. Isci, G. Contreras, and M. Martonosi. Live, runtime phase monitoring and prediction on real systems with application to dynamic power management. In Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 39, pages 359--370, Washington, DC, USA, 2006. IEEE Computer Society.
[13]
H. M. Jacobson, A. Buyuktosunoglu, P. Bose, E. Acar, and R. J. Eickemeyer. Abstraction and microarchitecture scaling in early-stage power modeling. In HPCA, pages 394--405. IEEE Computer Society, 2011.
[14]
R. Joseph and M. Martonosi. Run-time power estimation in high performance microprocessors. In Proceedings of the 2001 international symposium on Low power electronics and design, pages 135--140, New York, NY, USA, 2001. ACM.
[15]
M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. Power aware computing. chapter Compiler optimizations for low power systems, pages 191--210. Kluwer Academic Publishers, Norwell, MA, USA, 2002.
[16]
R. Kufrin. Perfsuite: An accessible, open source performance analysis environment for linux. In In Proc. of the Linux Cluster Conference, Chapel, 2005.
[17]
S. Li, J. H. Ahn, R. D. Strong, J. B. Brockman, D. M. Tullsen, and N. P. Jouppi. Mcpat: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 42, pages 469--480, New York, NY, USA, 2009. ACM.
[18]
P. J. Mucci, S. Browne, C. Deane, and G. Ho. Papi: A portable interface to hardware performance counters. In In Proceedings of the Department of Defense HPCMP Users Group Conference, pages 7--10, 1999.
[19]
M. D. Powell, A. Biswas, J. S. Emer, S. S. Mukherjee, B. R. Sheikh, and S. M. Yardi. Camp: A technique to estimate per-structure power at run-time using a few simple parameters. In HPCA, pages 289--300. IEEE Computer Society, 2009.
[20]
S. F. Rahman, J. Guo, and Q. Yi. Automated empirical tuning of scientific codes for performance and power consumption. In Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers, HiPEAC '11, pages 107--116, New York, NY, USA, 2011. ACM.
[21]
J. Seng and D. Tullsen. Exploring the potential of architecture-level power optimizations. In B. Falsafi and T. VijayKumar, editors, Power-Aware Computer Systems, volume 3164 of Lecture Notes in Computer Science, pages 132--147. Springer Berlin Heidelberg, 2005.
[22]
K. Singh, M. Bhadauria, and S. A. McKee. Real time power estimation and thread scheduling via performance counters. SIGARCH Comput. Archit. News, 37(2): 46--55, July 2009.
[23]
V. Spiliopoulos, A. Sembrant, and S. Kaxiras. Power-sleuth: A tool for investigating your program's power behavior. In Modeling, Analysis Simulation of Computer and Telecommunication Systems (MASCOTS), 2012 IEEE 20th International Symposium on, pages 241--250, Aug 2012.
[24]
M. Valluri and L. John. Is compiling for performance == compiling for power? In Interaction between Compilers and Computer Architectures, volume 613 of The Springer International Series in Engineering and Computer Science, pages 101--115. Springer US, 2001.
[25]
S. J. E. Wilton and N. P. Jouppi. Cacti: An enhanced cache access and cycle time model. IEEE Journal of Solid-State Circuits, 31: 677--688, 1996.
[26]
Y. Xiao, R. Bhaumik, Z. Yang, M. Siekkinen, P. Savolainen, and A. Yla-Jaaski. A system-level model for runtime power estimation on mobile devices. In Proceedings of the 2010 IEEE/ACM Int'L Conference on Green Computing and Communications & Int'L Conference on Cyber, Physical and Social Computing, pages 27--34, Washington, DC, USA, 2010. IEEE Computer Society.
[27]
C. Yoon, D. Kim, W. Jung, C. Kang, and H. Cha. Appscope: Application energy metering framework for android smartphones using kernel activity monitoring. In Proceedings of the 2012 USENIX Conference on Annual Technical Conference, USENIX ATC'12, pages 36--36, Berkeley, CA, USA, 2012. USENIX Association.
[28]
M. T. Yourst. Ptlsim: A cycle accurate full system x86-64 microarchitectural simulator. In ISPASS, 2007.
Index Terms
- Just-in-time component-wise power and thermal modeling
Recommendations
Hybrid power management in real time embedded systems: an interplay of DVFS and DPM techniques
Energy-aware scheduling of real time applications over multiprocessor systems is considered in this paper. Early research reports that while various energy-saving policies, for instance Dynamic Power Management (DPM) and Dynamic Voltage & Frequency ...
TSP: thermal safe power: efficient power budgeting for many-core systems in dark silicon
CODES '14: Proceedings of the 2014 International Conference on Hardware/Software Codesign and System SynthesisChip manufacturers provide the Thermal Design Power (TDP) for a specific chip. The cooling solution is designed to dissipate this power level. But because TDP is not necessarily the maximum power that can be applied, chips are operated with Dynamic ...
Measurement and modelling of the effective sleep time interval for dynamic power management of PCS
PDCN'07: Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: parallel and distributed computing and networksLow power consumption is an important factor in designing a PC system. Dynamic power management (DPM) can be an effective approach to the reduction of power consumption without significantly degrading performance. A system shuts down devices when they ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
May 2015
413 pages
ISBN:9781450333580
DOI:10.1145/2742854
- General Chairs:
- Claudia Di Napoli,
- Valentina Salapura,
- Program Chairs:
- Hubertus Franke,
- Rui Hou
Copyright © 2015 ACM.
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]
Sponsors
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Published: 06 May 2015
Check for updates
Author Tags
Qualifiers
- Research-article
Funding Sources
- NSF
Conference
CF'15
Sponsor:
Acceptance Rates
CF '15 Paper Acceptance Rate 33 of 96 submissions, 34%;
Overall Acceptance Rate 273 of 785 submissions, 35%
Upcoming Conference
CF '25
- Sponsor:
- sigmicro
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 118Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 12 Dec 2024
Other Metrics
Citations
View Options
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in