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Optimizing Memory Translation Emulation in Full System Emulators

Authors:

Toshihiko Koju,

Motohiro Kawahito,

Andreas MoshovosAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 11, Issue 4

Article No.: 60, Pages 1 - 24

https://doi.org/10.1145/2686034

Published: 09 January 2015 Publication History

Abstract

The emulation speed of a full system emulator (FSE) determines its usefulness. This work quantitatively measures where time is spent in QEMU [Bellard 2005], an industrial-strength FSE. The analysis finds that memory emulation is one of the most heavily exercised emulator components. For workloads studied, 38.1% of the emulation time is spent in memory emulation on average, even though QEMU implements a software translation lookaside buffer (STLB) to accelerate dynamic address translation. Despite the amount of time spent in memory emulation, there has been no study on how to further improve its speed. This work analyzes where time is spent in memory emulation and studies the performance impact of a number of STLB optimizations. Although there are several performance optimization techniques for hardware TLBs, this work finds that the trade-offs with an STLB are quite different compared to those with hardware TLBs. As a result, not all hardware TLB performance optimization techniques are applicable to STLBs and vice versa. The evaluated STLB optimizations target STLB lookups, as well as refills, and result in an average emulator performance improvement of 24.4% over the baseline.

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Cited By

Xie BLi XYan YYan CLiu TZhang TYang CZhang F(2023)On-Demand Triggered Memory Management Unit in Dynamic Binary TranslatorAdvanced Parallel Processing Technologies10.1007/978-981-99-7872-4_17(297-309)Online publication date: 4-Aug-2023
https://dl.acm.org/doi/10.1007/978-981-99-7872-4_17
Cota ECarloni LSartor JNaik MRossbach C(2019)Cross-ISA machine instrumentation using fast and scalable dynamic binary translationProceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/3313808.3313811(74-87)Online publication date: 14-Apr-2019
https://dl.acm.org/doi/10.1145/3313808.3313811
d'Antras AGorgovan CGarside JGoodacre JLuján M(2017)HyperMAMBO-X64ACM SIGPLAN Notices10.1145/3140607.305075652:7(228-241)Online publication date: 8-Apr-2017
https://dl.acm.org/doi/10.1145/3140607.3050756
Show More Cited By

Index Terms

Optimizing Memory Translation Emulation in Full System Emulators

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 11, Issue 4

January 2015

797 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/2695583

Editor:
Koen De Bosschere
Ghent University

Issue’s Table of Contents

Copyright © 2015 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 09 January 2015

Accepted: 01 November 2014

Revised: 01 September 2014

Received: 01 April 2014

Published in TACO Volume 11, Issue 4

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Cited By

Xie BLi XYan YYan CLiu TZhang TYang CZhang F(2023)On-Demand Triggered Memory Management Unit in Dynamic Binary TranslatorAdvanced Parallel Processing Technologies10.1007/978-981-99-7872-4_17(297-309)Online publication date: 4-Aug-2023
https://dl.acm.org/doi/10.1007/978-981-99-7872-4_17
Cota ECarloni LSartor JNaik MRossbach C(2019)Cross-ISA machine instrumentation using fast and scalable dynamic binary translationProceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/3313808.3313811(74-87)Online publication date: 14-Apr-2019
https://dl.acm.org/doi/10.1145/3313808.3313811
d'Antras AGorgovan CGarside JGoodacre JLuján M(2017)HyperMAMBO-X64ACM SIGPLAN Notices10.1145/3140607.305075652:7(228-241)Online publication date: 8-Apr-2017
https://dl.acm.org/doi/10.1145/3140607.3050756
d'Antras AGorgovan CGarside JGoodacre JLuján M(2017)HyperMAMBO-X64Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/3050748.3050756(228-241)Online publication date: 8-Apr-2017
https://dl.acm.org/doi/10.1145/3050748.3050756
Hong DHsu CChou CHsu WLiu PWu J(2015)Optimizing Control Transfer and Memory Virtualization in Full System EmulatorsACM Transactions on Architecture and Code Optimization10.1145/283702712:4(1-24)Online publication date: 8-Dec-2015
https://dl.acm.org/doi/10.1145/2837027

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