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Exploiting heterogeneity in MPSoCs to prevent potential trojan propagation across malicious IPs

Published: 20 May 2014 Publication History

Abstract

Multiprocessor System-on-Chip (MPSoC) platforms face some of the most demanding security concerns, as they process, store, and communicate sensitive information using third-party intellectual property (3PIP) cores. The trend of outsourcing design and fabrication strongly questions the assumption of 3PIP components being trustworthy. While existing research focuses on addressing hardware trojans in individual IPs, this paper improves MPSoC security from another perspective. Specifically, our goal is to prevent trojans in malicious IPs from triggering each other and leading to severe system-wide degradation in security and reliability. We propose to impose trojan isolation constraints during static task scheduling, ensuring that all legal communications on the target MPSoC are between IPs of different types. This in turn enables the runtime system to monitor and detect undesired communication paths, if any. We furthermore pose the security-constrained MPSoC task scheduling as a multi-dimensional optimization problem, and solve it through Integer Linear Programming (ILP), thus minimizing the associated performance, power, and hardware overhead. The results show that trojan isolation can be achieved within one extra vendor and nearly no performance overhead.

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Cited By

View all
  • (2020)Securing Cyber-Physical Systems from Hardware Trojan CollusionIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2017.27876948:3(655-667)Online publication date: 1-Jul-2020
  • (2016)A mutual auditing framework to protect IoT against hardware Trojans2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7427991(69-74)Online publication date: Jan-2016
  • (2014)Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task SchedulingIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2014.23481822:4(461-472)Online publication date: Dec-2014

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    cover image ACM Conferences
    GLSVLSI '14: Proceedings of the 24th edition of the great lakes symposium on VLSI
    May 2014
    376 pages
    ISBN:9781450328166
    DOI:10.1145/2591513
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 20 May 2014

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    Author Tags

    1. hardware trojan
    2. integer linear programming
    3. task scheduling

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    GLSVLSI '14
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    GLSVLSI '14: Great Lakes Symposium on VLSI 2014
    May 21 - 23, 2014
    Texas, Houston, USA

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    GLSVLSI '14 Paper Acceptance Rate 49 of 179 submissions, 27%;
    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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    Cited By

    View all
    • (2020)Securing Cyber-Physical Systems from Hardware Trojan CollusionIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2017.27876948:3(655-667)Online publication date: 1-Jul-2020
    • (2016)A mutual auditing framework to protect IoT against hardware Trojans2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7427991(69-74)Online publication date: Jan-2016
    • (2014)Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task SchedulingIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2014.23481822:4(461-472)Online publication date: Dec-2014

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