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View all- Cong JHwang Y(2006)Boolean matching for LUT-based logic blocks with applications to architecture evaluation and technology mappingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.94530320:9(1077-1090)Online publication date: 1-Nov-2006
- Lee KWong D(1999)An exact tree-based structural technology mapping algorithm for configurable logic blocks in FPGAsProceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)10.1109/ICCD.1999.808428(216-221)Online publication date: 1999
- Hansen MYalcin HHayes J(1999)Unveiling the ISCAS-85 BenchmarksIEEE Design & Test10.1109/54.78583816:3(72-80)Online publication date: 1-Jul-1999