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Practical speculative parallelization of variable-length decompression algorithms

Published: 25 October 2018 Publication History

Abstract

Variable-length coding is widely used for efficient data compression. Typically, the compressor splits the original data into blocks and compresses each block with variable-length codes, hence producing variable-length compressed blocks. Although the compressor can easily exploit ample block-level parallelism, it is much more difficult to extract such coarse-grain parallelism from the decompressor because a block boundary cannot be located until decompression of the previous block is completed. This paper presents novel algorithms to efficiently predict block boundaries and a runtime system that enables efficient block-level parallel decompression, called SDM. The SDM execution model features speculative pipelining with three stages: Scanner, Decompressor, and Merger. The scanner stage employs a high-confidence prediction algorithm that finds compressed block boundaries without fully decompressing individual blocks. This information is communicated to the parallel decompressor stage in which multiple blocks are decompressed in parallel. The decompressed blocks are merged in order by the merger stage to produce the final output. The SDM runtime is specialized to execute this pipeline correctly and efficiently on resource-constrained embedded platforms. With SDM we effectively parallelize three production-grade variable-length decompression algorithms?zlib, bzip2, and H.264?with maximum speedups of 2.50× and 8.53× (and geometric mean speedups of 1.96× and 4.04×) on 4-core and 36-core embedded platforms, respectively.

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Cited By

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  • (2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys (CSUR)10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
  • (2014)Security Vulnerability in Processor-Interconnect Router DesignProceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security10.1145/2660267.2660290(358-368)Online publication date: 3-Nov-2014

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Published In

cover image ACM Conferences
LCTES '13: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
June 2013
184 pages
ISBN:9781450320856
DOI:10.1145/2491899

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 25 October 2018

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Author Tags

  1. compression
  2. embedded systems
  3. multicores
  4. parallelization
  5. runtime
  6. speculation

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LCTES '13

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LCTES '13 Paper Acceptance Rate 16 of 60 submissions, 27%;
Overall Acceptance Rate 116 of 438 submissions, 26%

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Cited By

View all
  • (2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys (CSUR)10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
  • (2014)Security Vulnerability in Processor-Interconnect Router DesignProceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security10.1145/2660267.2660290(358-368)Online publication date: 3-Nov-2014

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