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Phase-based scheduling and thread migration for heterogeneous multicore processors

Published: 19 September 2012 Publication History

Abstract

Heterogeneous multicore processors (HMPs) can provide better performance and reduced energy consumption than homogeneous ones [3]. Differences between cores provide different processing capabilities for different applications; a dynamic scheduler can exploit these differences to maximize performance and minimize energy consumption [5, 6] by adapting to fine changes in programs behavior. This work proposes new fine-grained online HMP schedulers using program phase identification. However, exploiting fine-grained scheduling results in frequent thread migrations that can harm performance. OS context switching is time consuming (30-60μs [4]). To reduce context switching overhead, a context switching circuit that both accelerates thread switches among cores in HMPs and reduces switching cost within each core (multitasking) is introduced.

References

[1]
K. V. Craeynest, et al. Scheduling heterogeneous multi-cores through performance impact estimation (PIE). In ISCA'12.
[2]
A. S. Dhodapkar and J. E. Smith. Managing multi-configuration hardware via dynamic working set analysis. In ISCA'02.
[3]
R. Kumar, et al. Single-ISA heterogeneous multi-core architectures for multithreaded workload performance. In ISCA'04.
[4]
R. Ronen. The practical challenges of heterogneous architectures. Invited Talk at SHAW3'12.
[5]
L. Sawalha and R. D. Barnes. Energy-efficient phase-aware scheduling for heterogneous multicore processors. In IEEE GreenTech'12.
[6]
L. Sawalha, et al. Thread scheduling for heterogeneous multicore processors using phase identification. SIGMETRICS PER, 39(3):125--127, Dec. 2011.
[7]
T. Sondag and H. Rajan. Phase-based tuning for better utilization of performance-asymmetric multicore processors. In CGO'11.

Cited By

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  • (2020)Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core ProcessorsIEEE Transactions on Computers10.1109/TC.2020.2984607(1-1)Online publication date: 2020

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  1. Phase-based scheduling and thread migration for heterogeneous multicore processors

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    Published In

    cover image ACM Conferences
    PACT '12: Proceedings of the 21st international conference on Parallel architectures and compilation techniques
    September 2012
    512 pages
    ISBN:9781450311823
    DOI:10.1145/2370816

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 19 September 2012

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    Author Tags

    1. context switching
    2. fine-grain scheduling
    3. heterogeneous multicore

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    PACT '12
    Sponsor:
    • IFIP WG 10.3
    • SIGARCH
    • IEEE CS TCPP
    • IEEE CS TCAA

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    Overall Acceptance Rate 121 of 471 submissions, 26%

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    Cited By

    View all
    • (2020)Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core ProcessorsIEEE Transactions on Computers10.1109/TC.2020.2984607(1-1)Online publication date: 2020

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