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Courteous cache sharing: being nice to others in capacity management

Authors:

Shekhar Srikantaiah,

Mahmut Kandemir,

Mary Jane IrwinAuthors Info & Claims

DAC '12: Proceedings of the 49th Annual Design Automation Conference

Pages 678 - 687

https://doi.org/10.1145/2228360.2228482

Published: 03 June 2012 Publication History

Abstract

This paper proposes a cache management scheme for multiprogrammed, multithreaded applications, with the objective of obtaining maximum performance for both individual applications and the multithreaded workload mix. In this scheme, each individual application's performance is improved by increasing the priority of its slowest thread, while the overall system performance is improved by ensuring that each individual application's performance benefit does not come at the cost of a significant degradation to other application's threads that are sharing the same cache. Averaged over six workloads, our shared cache management scheme improves the performance of the combination of applications by 18%. These improvements across applications in each mix are also fair, as indicated by average fair speedup improvements of 10% across the threads of each application (averaged over all the workloads).

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Cited By

Sun GShen JVeidenbaum A(2019)Combining Prefetch Control and Cache Partitioning to Improve Multicore Performance2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS.2019.00103(953-962)Online publication date: May-2019
https://doi.org/10.1109/IPDPS.2019.00103
Jain RPanda PSubramoney S(2017)A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioningProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130572(800-805)Online publication date: 27-Mar-2017
https://dl.acm.org/doi/10.5555/3130379.3130572
Jain RPanda PSubramoney S(2017)A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioningDesign, Automation & Test in Europe Conference & Exhibition (DATE), 201710.23919/DATE.2017.7927098(800-805)Online publication date: Mar-2017
https://doi.org/10.23919/DATE.2017.7927098
Show More Cited By

Index Terms

Courteous cache sharing: being nice to others in capacity management
1. General and reference
  1. Cross-computing tools and techniques
    1. Design
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '12: Proceedings of the 49th Annual Design Automation Conference

June 2012

1357 pages

ISBN:9781450311991

DOI:10.1145/2228360

General Chair:
Patrick Groeneveld
Magma Design Automation, Inc., San Jose, CA
,
Program Chairs:
Donatella Sciuto
Politecnico di Milano, Milano, Italy
,
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

In-Cooperation

SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 June 2012

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Funding Sources

National Science Foundation

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DAC '12

Sponsor:

EDAC
SIGDA

DAC '12: The 49th Annual Design Automation Conference 2012

June 3 - 7, 2012

California, San Francisco

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

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sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

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Citations

Cited By

Sun GShen JVeidenbaum A(2019)Combining Prefetch Control and Cache Partitioning to Improve Multicore Performance2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS.2019.00103(953-962)Online publication date: May-2019
https://doi.org/10.1109/IPDPS.2019.00103
Jain RPanda PSubramoney S(2017)A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioningProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130572(800-805)Online publication date: 27-Mar-2017
https://dl.acm.org/doi/10.5555/3130379.3130572
Jain RPanda PSubramoney S(2017)A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioningDesign, Automation & Test in Europe Conference & Exhibition (DATE), 201710.23919/DATE.2017.7927098(800-805)Online publication date: Mar-2017
https://doi.org/10.23919/DATE.2017.7927098
Jain RPanda PSubramoney S(2017)Cooperative Multi-Agent Reinforcement Learning-Based Co-optimization of Cores, Caches, and On-chip NetworkACM Transactions on Architecture and Code Optimization10.1145/313217014:4(1-25)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3132170
Selfa VSahuquillo JPetit SGomez M(2017)A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared CachesIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.271377828:11(3021-3032)Online publication date: 1-Nov-2017
https://doi.org/10.1109/TPDS.2017.2713778
Selfa VSahuquillo JEeckhout LPetit SGomez M(2017)Application Clustering Policies to Address System Fairness with Intel’s Cache Allocation Technology2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT.2017.19(194-205)Online publication date: Sep-2017
https://doi.org/10.1109/PACT.2017.19
Parihar RBrock JDing CHuang M(2016)Hardware support for protective and collaborative cache sharingACM SIGPLAN Notices10.1145/3241624.292670551:11(24-35)Online publication date: 14-Jun-2016
https://dl.acm.org/doi/10.1145/3241624.2926705
Scolari ABartolini DSantambrogio M(2016)A Software Cache Partitioning System for Hash-Based CachesACM Transactions on Architecture and Code Optimization10.1145/301811313:4(1-24)Online publication date: 16-Dec-2016
https://dl.acm.org/doi/10.1145/3018113
Tajik HDonyanavard BDutt NJahn JHenkel J(2016)SPMPoolACM Transactions on Embedded Computing Systems10.1145/296844716:1(1-27)Online publication date: 23-Oct-2016
https://dl.acm.org/doi/10.1145/2968447
Parihar RBrock JDing CHuang MFlood CZhang Z(2016)Hardware support for protective and collaborative cache sharingProceedings of the 2016 ACM SIGPLAN International Symposium on Memory Management10.1145/2926697.2926705(24-35)Online publication date: 14-Jun-2016
https://dl.acm.org/doi/10.1145/2926697.2926705
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