Cited By
View all- Inuani MSaul J(2005)Technology mapping of heterogeneous LUT-based FPGAsField-Programmable Logic and Applications10.1007/3-540-63465-7_227(223-234)Online publication date: 29-Jul-2005
Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques
Pages 45 - es
Abstract
No abstract available.
Index Terms
- Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques
Recommendations
Packing Techniques for Virtex-5 FPGAs
Packing is a key step in the FPGA tool flow that straddles the boundaries between synthesis, technology mapping and placement. Packing strongly influences circuit speed, density, and power, and in this article, we consider packing in the commercial FPGA ...
Complex fuzzy logic
A novel framework for logical reasoning, termed complex fuzzy logic, is presented in this paper. Complex fuzzy logic is a generalization of traditional fuzzy logic, based on complex fuzzy sets. In complex fuzzy logic, inference rules are constructed and ...
Fracturable DSP Block for Multi-context Reconfigurable Architectures
Multi-context architectures like NATURE enable low-power applications to leverage fast context switching for improved energy efficiency and lower area footprint. The NATURE architecture incorporates 16-bit reconfigurable DSP blocks for accelerating ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
August 1995
Copyright © 1995 ACM.
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]
Sponsors
- IFIP WG 10.2: IFIP WG 10.2
- IFIP WG 10.5: IFIP WG 10.5
- ISPJ: ISPJ
- IEICE: Inst of Electronics, Info & Communication Engineers
- SIGDA: ACM Special Interest Group on Design Automation
- IEEE-CAS: Circuits & Systems
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Published: 01 August 1995
Check for updates
Qualifiers
- Article
Conference
ASPDAC95
Sponsor:
- IFIP WG 10.2
- IFIP WG 10.5
- ISPJ
- IEICE
- SIGDA
- IEEE-CAS
ASPDAC95: Asia Pacific Design Automation Conference
August 29 - September 1, 1995
Makuhari, Massa, Chiba, Japan
Acceptance Rates
Overall Acceptance Rate 466 of 1,454 submissions, 32%
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- View Citations1Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 26 Jan 2025
Other Metrics
Citations
Cited By
View all- Inuani MSaul J(2005)Technology mapping of heterogeneous LUT-based FPGAsField-Programmable Logic and Applications10.1007/3-540-63465-7_227(223-234)Online publication date: 29-Jul-2005