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Analysis and compute of real-time signal flow delay for network on-chip

Published: 13 August 2011 Publication History

Abstract

Analyzing the delay characteristics of System-on-chip network on multi-core chip, establishing the signal flow model based on the signal flow structure and time measurement method, the network transfer mode based on the centralized leading node proposed the network routing algorithm and signal flow priority queuing transmission scheduling algorithm, and gave the signal flow delay time and the least upper bound calculation of router cache. At the same time, certified the scheduling algorithm can make sure the delay constraints, the result of algorithm meet the timely and determinism of real test.

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  • (2019)Delay Bound Optimization in NoC Using a Discrete Firefly AlgorithmElectronics10.3390/electronics81215078:12(1507)Online publication date: 9-Dec-2019

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  1. Analysis and compute of real-time signal flow delay for network on-chip

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    ICCC '11: Proceedings of the 2011 International Conference on Innovative Computing and Cloud Computing
    August 2011
    131 pages
    ISBN:9781450305679
    DOI:10.1145/2071639
    • General Chairs:
    • Honghua Tan,
    • Jun Zhang,
    • Program Chairs:
    • Dehuai Yang,
    • Yanwen Wu
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    • Wuhan Univ.: Wuhan University, China

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    Published: 13 August 2011

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    Author Tags

    1. muti-core NOC
    2. signal flow
    3. timing sequence analysis
    4. transmission delay

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    • Wuhan Univ.

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    • (2019)Delay Bound Optimization in NoC Using a Discrete Firefly AlgorithmElectronics10.3390/electronics81215078:12(1507)Online publication date: 9-Dec-2019

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