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Multi-core architectures and streaming applications

Authors:

Gerard J.M. Smit,

André B.J. Kokkeler,

Pascal T. Wolkotte,

Marcel D. van de BurgwalAuthors Info & Claims

SLIP '08: Proceedings of the 2008 international workshop on System level interconnect prediction

Pages 35 - 42

https://doi.org/10.1145/1353610.1353618

Published: 05 April 2008 Publication History

Abstract

In this paper we focus on algorithms and reconfigurable multi-core architectures for streaming digital signal processing (DSP) applications. The multi-core concept has a number of advantages: (1) depending on the requirements more or fewer cores can be switched on/off, (2) the multi-core structure fits well to future process technologies, more cores will be available in advanced process technologies, but the complexity per core does not increase, (3) the multi-core concept is fault tolerant, faulty cores can be discarded and (4) multiple cores can be configured fast in parallel. Because in our approach processing and memory are combined in the cores, tasks can be executed efficiently on cores (locality of reference). There are a number of application domains that can be considered as streaming DSP applications: for example wireless baseband processing (for HiperLAN/2, WiMax, DAB, DRM, and DVB), multimedia processing (e.g. MPEG, MP3 coding/decoding), medical image processing, colour image processing, sensor processing (e.g. remote surveillance cameras) and phased array radar systems. In this paper the key characteristics of streaming DSP applications are highlighted, and the characteristics of the processing architectures to efficiently support these types of applications are addressed. We present the initial results of the Annabelle chip that we designed with our approach.

References

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M. D. van de Burgwal, G. J. M. Smit, G. K. Rauwerda, and P. M. Heysters. Hydra: an energy-efficient and reconfigurable network interface. In Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06), pages 171--177, Las Vegas, NV, USA, June 2006. CSREA Press.

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P. T. Wolkotte, G. J. M. Smit, G. K. Rauwerda, and L. T. Smit. An energy-efficient reconfigurable circuit-switched network-on-chip. In Proceedings of the 12th Reconfigurable Architecture Workshop (RAW 2005), page 155, Washington, DC, USA, April 2005. IEEE Computer Society.

Digital Library

Cited By

Benmoussa YSenn EDerouineau NTizon NBoukhobza J(2018)Joint DVFS and Parallelism for Energy Efficient and Low Latency Software Video DecodingIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.277981229:4(858-872)Online publication date: 1-Apr-2018
https://doi.org/10.1109/TPDS.2017.2779812
Benmoussa YBoukhobza JSenn EBenazzouz D(2015)On the energy efficiency of parallel multi-core vs hardware accelerated HD video decodingACM SIGBED Review10.1145/2724942.272494611:4(25-30)Online publication date: 22-Jan-2015
https://dl.acm.org/doi/10.1145/2724942.2724946
Benmoussa YBoukhobza JSenn EHadjadj-Aoul YBenazzouz D(2015)A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applicationsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.11.00361:1(49-70)Online publication date: 1-Jan-2015
https://dl.acm.org/doi/10.1016/j.sysarc.2014.11.003
Show More Cited By

Index Terms

Multi-core architectures and streaming applications
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Heterogeneous (hybrid) systems
2. General and reference
  1. Cross-computing tools and techniques
    1. Design

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Information & Contributors

Information

Published In

cover image ACM Conferences

SLIP '08: Proceedings of the 2008 international workshop on System level interconnect prediction

April 2008

104 pages

ISBN:9781595939180

DOI:10.1145/1353610

General Chair:
Ion Mandoiu
University of Connecticut, USA
,
Program Chair:
Andrew Kennings
University of Waterloo, Canada

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 April 2008

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Invited-talk

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SLIP08

Sponsor:

SLIP08: International Workshop on System Level Interconnect Prediction

April 5 - 8, 2008

Newcastle, United Kingdom

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Overall Acceptance Rate 6 of 8 submissions, 75%

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Citations

Cited By

Benmoussa YSenn EDerouineau NTizon NBoukhobza J(2018)Joint DVFS and Parallelism for Energy Efficient and Low Latency Software Video DecodingIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.277981229:4(858-872)Online publication date: 1-Apr-2018
https://doi.org/10.1109/TPDS.2017.2779812
Benmoussa YBoukhobza JSenn EBenazzouz D(2015)On the energy efficiency of parallel multi-core vs hardware accelerated HD video decodingACM SIGBED Review10.1145/2724942.272494611:4(25-30)Online publication date: 22-Jan-2015
https://dl.acm.org/doi/10.1145/2724942.2724946
Benmoussa YBoukhobza JSenn EHadjadj-Aoul YBenazzouz D(2015)A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applicationsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.11.00361:1(49-70)Online publication date: 1-Jan-2015
https://dl.acm.org/doi/10.1016/j.sysarc.2014.11.003
Rutzig M(2012)Multicore Platforms: Processors, Communication and MemoriesAdaptable Embedded Systems10.1007/978-1-4614-1746-0_8(243-277)Online publication date: 20-Oct-2012
https://doi.org/10.1007/978-1-4614-1746-0_8
Rutzig MBeck AMadruga FAlves MFreitas HMaillard NNavaux PCarro L(2011)Boosting parallel applications performance on applying DIM technique in a multiprocessing environmentInternational Journal of Reconfigurable Computing10.1155/2011/5469622011(1-13)Online publication date: 1-Jan-2011
https://dl.acm.org/doi/10.1155/2011/546962
Rovers Kvan de Burgwal MKuper JKokkeler ASmit G(2011)Multi-domain transformational design flow for embedded systems2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation10.1109/SAMOS.2011.6045449(93-101)Online publication date: Jul-2011
https://doi.org/10.1109/SAMOS.2011.6045449
van de Burgwal MRovers KBlom KKokkeler ASmit G(2011)Mobile satellite reception with a virtual satellite dish based on a reconfigurable multi-processor architectureMicroprocessors & Microsystems10.1016/j.micpro.2011.08.00535:8(716-728)Online publication date: 1-Nov-2011
https://dl.acm.org/doi/10.1016/j.micpro.2011.08.005
Rutzig MMadruga FAlves MCota HBeck AMaillard NNavaux PCarro L(2010)TLP and ILP exploitation through a reconfigurable multiprocessor system2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW)10.1109/IPDPSW.2010.5470743(1-8)Online publication date: Apr-2010
https://doi.org/10.1109/IPDPSW.2010.5470743
Tang TLin YRen X(2010)Mapping OpenMP concepts to the stream programming model2010 5th International Conference on Computer Science & Education10.1109/ICCSE.2010.5593822(1900-1905)Online publication date: Aug-2010
https://doi.org/10.1109/ICCSE.2010.5593822
Singh ASrikanthan TKumar AJigang W(2010)Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platformsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2010.04.00756:7(242-255)Online publication date: 1-Jul-2010
https://dl.acm.org/doi/10.1016/j.sysarc.2010.04.007
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