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Article

An adaptive two-level management for the flash translation layer in embedded systems

Authors:

Tei-Wei KuoAuthors Info & Claims

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

Pages 601 - 606

https://doi.org/10.1145/1233501.1233624

Published: 05 November 2006 Publication History

Abstract

While the capacity of flash-memory storage systems keeps increasing significantly, effective and efficient management of flash-memory space has become a critical design issue! Different granularities in space management impose different management costs and mapping efficiency. In this paper, we explore an address translation mechanism that can dynamically and adaptively switch between two granularities in the mapping of logical block addresses into physical block addresses in flash memory management. The objective is to provide good performance in address mapping and space utilization and, at the same time, to have the memory space requirements, and the garbage collection overhead under proper management. The experimental results show that the proposed adaptive mechanism could provide significant performance improvement over the well-known coarsegrained management mechanism NFTL (NAND Flash Translation Layer) over realistic workloads.

References

[1]

R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, "Introduction to Flash Memory," Proceedings of The IEEE, Vol. 91, No. 4, April 2003.

[2]

L. P. Chang and T. W. Kuo, "An Adaptive Stripping Architecture for Flash Memory Storage Systems of Embedded Systems," IEEE Eighth Real-Time and Embedded Technology and Applications Symposium (RTAS), San Jose, USA, Sept 2002.

Digital Library

[3]

J. Kim, J. M. Kim, S. H. Noh, S. L. Min, and Y. Cho, "A Space-Efficient Flash Translation Layer for Compact-Flash Systems," IEEE Transactions on Consumer Electronics, Vol. 48, No. 2, MAY 2002.

Digital Library

[4]

M. Wu, and W. Zwaenepoel, "eNVy: A Non-Volatile, Main Memory Storage System," Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 1994), 1994.

Digital Library

[5]

A. Kawaguchi, S. Nishioka, and H. Motoda, "A Flash-Memory Based File System," USENIX Technical Conference on Unix and Advanced Computing Systems, 1995.

Digital Library

[6]

H. J. Kim and S. G. Lee, "A New Flash Memory Management for Flash Storage System," Twenty-Third Annual International Computer Software and Applications Conference October 25--26, 1999 Phoenix, Arizona.

Digital Library

[7]

C. H. Wu, L. P. Chang, and T. W. Kuo, "An Efficient B-Tree Layer for Flash-Memory Storage Systems," accepted and will appear in ACM Transactions on Embedded Computing Systems (TECS).

Digital Library

[8]

C. H. Wu, T. W. Kuo, and L. P. Chang, "The Design of Efficient Initialization and Crash Recovery for Log-based File Systems over Flash Memory," accepted and will appear in ACM Transactions on Storage (TOS).

Digital Library

[9]

C. H. Wu, L. P. Chang, and T. W. Kuo, "An Efficient R-Tree Implementation over Flash-Memory Storage Systems," The 11th International Symposium on Advances in Geographic Information Systems (ACM-GIS 2003).

Digital Library

[10]

C. H. Wu, T. W. Kuo, and C. L. Yang, "Energy-Efficient Flash-Memory Storage Systems with Interrupt-Emulation Mechanism," accepted and to appear in the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Stockholm, Sweden, September, 2004.

Digital Library

[11]

C. H. Wu, T. W. Kuo, and C. L. Yang, "A Space-Efficient Caching Mechanism for Flash-Memory Address Translation," The 9th IEEE International Symposium on Object and component-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea, April, 2006.

Digital Library

[12]

U.S. Pat. No. 5,404,485 "FLASH FILE SYSTEM"

[13]

U.S. Pat. No. 5,937,425 "FLASH FILE SYSTEM OPTIMIZED FOR PAGE-MODE FLASH TECHNOLOGIES"

[14]

Intel Corporation, "Understanding the Flash Translation Layer(FTL) Specification".

[15]

Intel Corporation, "Software Concerns of Implementing a Resident Flash Disk".

[16]

Intel Corporation, "FTL Logger Exchanging Data with FTL Systems".

[17]

Intel Corporation, "LFS File Manager Software: LFM".

[18]

Samsung Electronics. NAND flash-memory datasheet and SmartMedia data book, 2006.

Cited By

Wang WLin PLi YHo CChang YChang Y(2019)Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD45719.2019.8942084(1-8)Online publication date: Nov-2019
https://doi.org/10.1109/ICCAD45719.2019.8942084
Ho CChang YChang YKuo T(2018)An SLC-Like Programming Scheme for MLC Flash MemoryACM Transactions on Storage10.1145/312925714:1(1-26)Online publication date: 9-Mar-2018
https://dl.acm.org/doi/10.1145/3129257
Kim DPark KYoun C(2017)SUPAACM Transactions on Storage10.1145/312990113:4(1-30)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3129901
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Index Terms

An adaptive two-level management for the flash translation layer in embedded systems

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cover image ACM Conferences

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

November 2006

147 pages

ISBN:1595933891

DOI:10.1145/1233501

General Chair:
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS: Circuits & Systems
IEEE-CS: Computer Society

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Association for Computing Machinery

New York, NY, United States

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Published: 05 November 2006

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ICCAD06: The International Conference on Computer-Aided Design 2006

November 5 - 9, 2006

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Wang WLin PLi YHo CChang YChang Y(2019)Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD45719.2019.8942084(1-8)Online publication date: Nov-2019
https://doi.org/10.1109/ICCAD45719.2019.8942084
Ho CChang YChang YKuo T(2018)An SLC-Like Programming Scheme for MLC Flash MemoryACM Transactions on Storage10.1145/312925714:1(1-26)Online publication date: 9-Mar-2018
https://dl.acm.org/doi/10.1145/3129257
Kim DPark KYoun C(2017)SUPAACM Transactions on Storage10.1145/312990113:4(1-30)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3129901
Liu DZhong KWang TWang YShao ZSha EXue J(2017)Durable Address Translation in PCM-Based Flash Storage SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2016.258605928:2(475-490)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1109/TPDS.2016.2586059
Ji CWu CChang LShi LXue C(2016)I/O scheduling with mapping cache awareness for flash based storage systemsProceedings of the 13th International Conference on Embedded Software10.1145/2968478.2968503(1-10)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1145/2968478.2968503
Chen RWang YHu JLiu DShao ZGuan Y(2016)Image-Content-Aware I/O Optimization for Mobile VirtualizationACM Transactions on Embedded Computing Systems10.1145/295005916:1(1-24)Online publication date: 13-Oct-2016
https://dl.acm.org/doi/10.1145/2950059
Wang YQin ZChen RShao ZWang QLi SYang L(2016)A Real-Time Flash Translation Layer for NAND Flash Memory Storage SystemsIEEE Transactions on Multi-Scale Computing Systems10.1109/TMSCS.2016.25160152:1(17-29)Online publication date: 1-Jan-2016
https://dl.acm.org/doi/10.1109/TMSCS.2016.2516015
Chang YChang YKuo TLi YLi H(2016)Disturbance Relaxation for 3D Flash MemoryIEEE Transactions on Computers10.1109/TC.2015.245166065:5(1467-1483)Online publication date: 1-May-2016
https://dl.acm.org/doi/10.1109/TC.2015.2451660
Yang MChang YKuo THuang P(2016)Capacity-Independent Address Mapping for Flash Storage Devices with Explosively Growing CapacityIEEE Transactions on Computers10.1109/TC.2015.242870265:2(448-465)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1109/TC.2015.2428702
Wang WChang YHuang PTu CWei HShih W(2016)Relay-based key management to support secure deletion for resource-constrained flash-memory storage devices2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7428052(444-449)Online publication date: Jan-2016
https://doi.org/10.1109/ASPDAC.2016.7428052
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