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Article

ASIP approach for implementation of H.264/AVC

Published: 24 January 2006 Publication History

Abstract

This paper presents an Application-Specific Instruction Set Processor (ASIP) approach for implementation of H.264/AVC. The proposed ASIP has special instructions for intra prediction, deblocking filter, integer transform, etc. In addition, the proposed ASIP has hardware accelerators for inter prediction and entropy coding. Performance comparisons show a significant improvement compared with existing DSPs. The proposed hardware accelerators have small size and can support real-time video processing. Moreover, the proposed ASIP can handle various multimedia standards. The results indicate that the ASIP approach is one of promising solutions for H.264/AVC.

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Cited By

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  • (2017)Background and Related WorkEnergy Efficient Embedded Video Processing Systems10.1007/978-3-319-61455-7_2(25-65)Online publication date: 19-Sep-2017
  • (2014)Design an ASIP for edit distance algorithm in pattern recognition2014 22nd Iranian Conference on Electrical Engineering (ICEE)10.1109/IranianCEE.2014.6999676(971-975)Online publication date: May-2014
  • (2012)Real-time computation of local neighborhood functions in application-specific instruction-set processorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.217020420:11(2031-2043)Online publication date: 1-Nov-2012
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Information & Contributors

Information

Published In

cover image ACM Conferences
ASP-DAC '06: Proceedings of the 2006 Asia and South Pacific Design Automation Conference
January 2006
998 pages
ISBN:0780394518

Sponsors

  • IEEE Circuits and Systems Society
  • SIGDA: ACM Special Interest Group on Design Automation
  • IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
  • IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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IEEE Press

Publication History

Published: 24 January 2006

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

View all
  • (2017)Background and Related WorkEnergy Efficient Embedded Video Processing Systems10.1007/978-3-319-61455-7_2(25-65)Online publication date: 19-Sep-2017
  • (2014)Design an ASIP for edit distance algorithm in pattern recognition2014 22nd Iranian Conference on Electrical Engineering (ICEE)10.1109/IranianCEE.2014.6999676(971-975)Online publication date: May-2014
  • (2012)Real-time computation of local neighborhood functions in application-specific instruction-set processorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.217020420:11(2031-2043)Online publication date: 1-Nov-2012
  • (2009)Application-specific instruction set processor for H.264 on-chip encoder2009 International SoC Design Conference (ISOCC)10.1109/SOCDC.2009.5423839(373-376)Online publication date: Nov-2009
  • (2009)High performance ASIP implementation of PBDI — A new intra-field deinterlacing method2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference10.1109/NEWCAS.2009.5290458(1-4)Online publication date: Jun-2009
  • (2009)An ASIP encoder for Quasi-Cyclic LDPC codes2009 IEEE International Conference on Intelligent Computing and Intelligent Systems10.1109/ICICISYS.2009.5358107(585-588)Online publication date: Nov-2009
  • (2009)An multi-rate LDPC decoder based on ASIP for DMB-TH2009 IEEE 8th International Conference on ASIC10.1109/ASICON.2009.5351527(995-998)Online publication date: Oct-2009
  • (2008)Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration9th International Symposium on Quality Electronic Design (isqed 2008)10.1109/ISQED.2008.4479748(321-324)Online publication date: Mar-2008
  • (2008)ASIP Approach for Implementation of H.264/AVCJournal of Signal Processing Systems10.1007/s11265-007-0109-y50:1(53-67)Online publication date: 1-Jan-2008
  • (2007)Neural network processor for a FPGA-based multiband fluorometer deviceProceedings of the 2007 IEEE International Conference on Application-Specific Systems, Architectures and Processors10.1109/ASAP.2007.4429990(198-202)Online publication date: 9-Jul-2007

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