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Profile-based adaptation for cache decay

Authors:

Karthik Sankaranarayanan,

Kevin SkadronAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 1, Issue 3

Pages 305 - 322

https://doi.org/10.1145/1022969.1022972

Published: 01 September 2004 Publication History

Abstract

"Cache decay" is a set of leakage-reduction mechanisms that put cache lines that have not been accessed for a specific duration into a low-leakage standby mode. This duration is called the decay interval, and its optimal value varies across applications. This paper describes an adaptation technique that analytically finds the optimal decay interval through profiling, and shows that the most important variables required for finding the optimal decay interval can be estimated with a reasonable degree of accuracy using profiling. This work explicitly trades off the leakage power saved in putting both the "live" and "dead" lines into standby mode, against its performance and energy costs. It achieves energy savings close to what can be obtained with an omniscient choice of per-benchmark optimal decay interval.

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Digital Library

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Digital Library

Cited By

Kang DChoi J(2015)Forgetting based File Cache Management Scheme for Non-Volatile MemoryJournal of KIISE10.5626/JOK.2015.42.8.97242:8(972-978)Online publication date: 15-Aug-2015
https://doi.org/10.5626/JOK.2015.42.8.972
Arima ENoguchi HNakada TMiwa STakeda SFujita SNakamura H(2015)Immediate sleepProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357096(149-156)Online publication date: 18-Oct-2015
https://dl.acm.org/doi/10.1109/ICCD.2015.7357096
Chen YFang SHuang YEeckhout LFursin GTemam OWu C(2012)Deconstructing iterative optimizationACM Transactions on Architecture and Code Optimization10.1145/2355585.23555949:3(1-30)Online publication date: 5-Oct-2012
https://dl.acm.org/doi/10.1145/2355585.2355594
Show More Cited By

Index Terms

Profile-based adaptation for cache decay
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Special purpose systems
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 1, Issue 3

September 2004

121 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/1022969

Issue’s Table of Contents

Copyright © 2004 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 September 2004

Published in TACO Volume 1, Issue 3

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Cited By

Kang DChoi J(2015)Forgetting based File Cache Management Scheme for Non-Volatile MemoryJournal of KIISE10.5626/JOK.2015.42.8.97242:8(972-978)Online publication date: 15-Aug-2015
https://doi.org/10.5626/JOK.2015.42.8.972
Arima ENoguchi HNakada TMiwa STakeda SFujita SNakamura H(2015)Immediate sleepProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357096(149-156)Online publication date: 18-Oct-2015
https://dl.acm.org/doi/10.1109/ICCD.2015.7357096
Chen YFang SHuang YEeckhout LFursin GTemam OWu C(2012)Deconstructing iterative optimizationACM Transactions on Architecture and Code Optimization10.1145/2355585.23555949:3(1-30)Online publication date: 5-Oct-2012
https://dl.acm.org/doi/10.1145/2355585.2355594
Chen YHuang YEeckhout LFursin GPeng LTemam OWu C(2010)Evaluating iterative optimization across 1000 datasetsACM SIGPLAN Notices10.1145/1809028.180664745:6(448-459)Online publication date: 5-Jun-2010
https://dl.acm.org/doi/10.1145/1809028.1806647
Chen YHuang YEeckhout LFursin GPeng LTemam OWu CZorn BAiken A(2010)Evaluating iterative optimization across 1000 datasetsProceedings of the 31st ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/1806596.1806647(448-459)Online publication date: 5-Jun-2010
https://dl.acm.org/doi/10.1145/1806596.1806647
Kadayif IZorlubas AKoyuncu SKabal OAkcicek DSahin YKandemir M(2008)Capturing and optimizing the interactions between prefetching and cache line turnoffMicroprocessors & Microsystems10.1016/j.micpro.2008.05.00332:7(394-404)Online publication date: 1-Oct-2008
https://dl.acm.org/doi/10.1016/j.micpro.2008.05.003
Meng YSherwood TKastner R(2005)Exploring the limits of leakage power reduction in cachesACM Transactions on Architecture and Code Optimization10.1145/1089008.10890092:3(221-246)Online publication date: 1-Sep-2005
https://dl.acm.org/doi/10.1145/1089008.1089009
Juang PSkadron KMartonosi MHu ZClark DDiodato PKaxiras S(2004)Implementing branch-predictor decay using quasi-static memory cellsACM Transactions on Architecture and Code Optimization10.1145/1011528.10115311:2(180-219)Online publication date: 1-Jun-2004
https://dl.acm.org/doi/10.1145/1011528.1011531

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