Article

Scaling trends in adiabatic logic

Authors:

Juergen Fischer,

Philip Teichmann,

Doris Schmitt-LandsiedelAuthors Info & Claims

CF '05: Proceedings of the 2nd conference on Computing frontiers

Pages 427 - 434

https://doi.org/10.1145/1062261.1062333

Published: 04 May 2005 Publication History

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Abstract

Adiabatic circuits which are able to dissipate less energy than the fundamental limit of static CMOS are promising candidates for low-power circuits in the frequency range in which signals are digitally processed. This paper shows the main sources of the energy dissipation in adiabatic circuits. It will be presented that with state-of-the-art transistors the distinction between quasi- and fully adiabatic circuits has become obsolete. With the shrinking of the transistor dimensions, new leakage mechanisms like gate leakage occur. As the adiabatic circuits work with an oscillating power supply, leakage currents flow only a part of the period. Without any further effort adiabatic circuits save about 30% of energy dissipation caused by leakage. As in static CMOS, adiabatic circuits benefit from voltage scaling. The Efficient Charge Recovery Logic scales linearly down to supply voltages near the threshold voltage. Simulations with a sinusoidal power supply showed no significant difference to a trapezoidal supply at most frequencies. For overall dissipation accounting also for generator efficiency and attenuation on the wiring, the sinusoidal supply voltage should be preferred

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Cited By

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Willingham DKale I(2008)Using Positive Feedback Adiabatic Logic to implement Reversible Toffoli Gates2008 NORCHIP10.1109/NORCHP.2008.4738271(5-8)Online publication date: Nov-2008
https://doi.org/10.1109/NORCHP.2008.4738271
Pradhan SPaul GPal ABhattacharya B(2006)Power Aware BDD-based Logic Synthesis Using Adiabatic Multiplexers2006 International Conference on Electrical and Computer Engineering10.1109/ICECE.2006.355312(149-152)Online publication date: Dec-2006
https://doi.org/10.1109/ICECE.2006.355312

Index Terms

Scaling trends in adiabatic logic
1. Hardware
  1. Emerging technologies
  2. Very large scale integration design

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Published In

CF '05: Proceedings of the 2nd conference on Computing frontiers

May 2005

467 pages

ISBN:1595930191

DOI:10.1145/1062261

General Chair:
Nader Bagherzadeh,
Program Chairs:
Mateo Valero,
Alex Ramirez

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Published: 04 May 2005

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Willingham DKale I(2008)Using Positive Feedback Adiabatic Logic to implement Reversible Toffoli Gates2008 NORCHIP10.1109/NORCHP.2008.4738271(5-8)Online publication date: Nov-2008
https://doi.org/10.1109/NORCHP.2008.4738271
Pradhan SPaul GPal ABhattacharya B(2006)Power Aware BDD-based Logic Synthesis Using Adiabatic Multiplexers2006 International Conference on Electrical and Computer Engineering10.1109/ICECE.2006.355312(149-152)Online publication date: Dec-2006
https://doi.org/10.1109/ICECE.2006.355312

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Recommendations

UTB-SOI based adiabatic computing for low-power and secure IoT devices

An advanced adiabatic logic using Gate Overlap Tunnel FET (GOTFET) devices for ultra-low power VLSI sensor applications

A GHz-class charge recovery logic

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