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Fast, efficient, recovering, and irreversible

Published: 04 May 2005 Publication History

Abstract

Recent advances in CMOS VLSI design have taken us to real working chips that rely on controlled charge recovery to operate at sub-stantially lower power dissipation levels than their conventional counterparts. In this paper, we present two such chips that were designed in our research group and highlight some of the promising charge-recovery techniques in practice. Although their origins can be traced back to the early adiabatic circuits, these techniques approach energy recycling from a more practical angle, shedding reversibility to achieve operating frequencies in excess of 1GHz with relatively low overheads

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    cover image ACM Conferences
    CF '05: Proceedings of the 2nd conference on Computing frontiers
    May 2005
    467 pages
    ISBN:1595930191
    DOI:10.1145/1062261
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 04 May 2005

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    Author Tags

    1. adiabatic computing
    2. charge-recovery circuits
    3. resonant systems
    4. reversible logic

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    May 4 - 6, 2005
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