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Silicon trends and limits for advanced microprocessors

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Mark BohrAuthors Info & Claims

Communications of the ACM, Volume 41, Issue 3

Pages 80 - 87

https://doi.org/10.1145/272287.272327

Published: 01 March 1998 Publication History

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Azimi AAzimi MShur MO’Leary S(2024)The transition between the collision-dominated and ballistic electron transport regimes as the device length is reduced: A continuum analysisJournal of Applied Physics10.1063/5.0211046136:3Online publication date: 16-Jul-2024
https://doi.org/10.1063/5.0211046
Azimi AAzimi MShur MO’Leary S(2023)The impact of device length on the electron’s effective mobilityJournal of Applied Physics10.1063/5.0171559134:12Online publication date: 28-Sep-2023
https://doi.org/10.1063/5.0171559
Tsague HTwala B(2015)Leakage current minimisation and power reduction techniques using sub-threshold design2015 International Conference on Information Society (i-Society)10.1109/i-Society.2015.7366877(146-150)Online publication date: Nov-2015
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Silicon trends and limits for advanced microprocessors

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Communications of the ACM Volume 41, Issue 3

March 1998

100 pages

ISSN:0001-0782

EISSN:1557-7317

DOI:10.1145/272287

Editor:
Diane Crawford

Issue’s Table of Contents

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Published: 01 March 1998

Published in CACM Volume 41, Issue 3

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Azimi AAzimi MShur MO’Leary S(2024)The transition between the collision-dominated and ballistic electron transport regimes as the device length is reduced: A continuum analysisJournal of Applied Physics10.1063/5.0211046136:3Online publication date: 16-Jul-2024
https://doi.org/10.1063/5.0211046
Azimi AAzimi MShur MO’Leary S(2023)The impact of device length on the electron’s effective mobilityJournal of Applied Physics10.1063/5.0171559134:12Online publication date: 28-Sep-2023
https://doi.org/10.1063/5.0171559
Tsague HTwala B(2015)Leakage current minimisation and power reduction techniques using sub-threshold design2015 International Conference on Information Society (i-Society)10.1109/i-Society.2015.7366877(146-150)Online publication date: Nov-2015
https://doi.org/10.1109/i-Society.2015.7366877
Chen YZeng XZhou HFettweis GNebel W(2014)Recovery-based resilient latency-insensitive systemsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616733(1-6)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2616733
Kim YIkeda MAsada K(2010)Analysis on Light Transmission through Multi-Metal-Layers for CMOS Image SensorsThe Journal of The Institute of Image Information and Television Engineers10.3169/itej.64.41964:3(419-422)Online publication date: 2010
https://doi.org/10.3169/itej.64.419
Beerel POzdag RFerretti M(2010)Asynchronous crossbarA Designer's Guide to Asynchronous VLSI10.1017/CBO9780511674730.014(304-312)Online publication date: 26-Feb-2010
https://doi.org/10.1017/CBO9780511674730.014
Spory E(2007)A reliability study in P-channel punchthrough for ASIC CMOS input/output buffer leakage2007 IEEE International Integrated Reliability Workshop Final Report10.1109/IRWS.2007.4469241(139-142)Online publication date: Oct-2007
https://doi.org/10.1109/IRWS.2007.4469241
Carloni LMcMillan KSangiovanni-Vincentelli A(2006)Theory of latency-insensitive designIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.94530220:9(1059-1076)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.945302
Hussein MHe J(2005)Materials' Impact on Interconnect Process Technology and ReliabilityIEEE Transactions on Semiconductor Manufacturing10.1109/TSM.2004.84183218:1(69-85)Online publication date: Feb-2005
https://doi.org/10.1109/TSM.2004.841832
Chandra VSchmit HXu APileggi L(2004)A power aware system level interconnect design methodology for latency-insensitive systemsProceedings of the 2004 IEEE/ACM International conference on Computer-aided design10.1109/ICCAD.2004.1382586(275-282)Online publication date: 7-Nov-2004
https://dl.acm.org/doi/10.1109/ICCAD.2004.1382586
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Scaling silicon MOS devices to their limits

Trends of Key Advanced Device Technologies

Limits of Scaling MOSFETs

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