Abstract
In this paper we present an experimental study on the effectivenessof incorporating at-speed I DDQ testing with traditionalBIST for improved test coverage. The high speed I DDQtesting is conducted using the differential built-in on-chip current sensor(BICS) that we have recently developed. Two test chips were designed andfabricated implementing a CMOS version of the 74181 ALU chip. In copies ofthis circuit we included the capability of activating 45 different“realistic” CMOS faults: inter- and intra-layer shorts andopens. We examine the fault coverage of both Boolean (voltage) testing andI DDQ testing for these realistic faults. An interestingfinding of our study is that I DDQ testing also detectedseveral of the open faults. Moreover, these include precisely those openfaults for which two pattern voltage tests can get invalidated because oftransient switching states. Our results show that combining both Boolean andcurrent testing does enhance test coverage in a BIST environment.
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Weber, W.W., Singh, A.D. Incorporating I DDQ Testing with BIST for Improved Coverage: An Experimental Study. Journal of Electronic Testing 11, 147–156 (1997). https://doi.org/10.1023/A:1008218422533
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DOI: https://doi.org/10.1023/A:1008218422533