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A Fractional-Order Meminductor Emulator Using OTA and CDBA with Application in Adaptive Learning Circuit

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Abstract

In this paper, a new memristor-less fractional-order meminductor emulator has been presented based on two operational transconductance amplifiers (OTAs), and a current differencing buffered amplifier (CDBA). The integer and fractional capacitors have been utilized in the proposed design of floating and grounded types. It also offers the freedom of conversion between incremental and decremental in both the types i.e., grounded, and floating. The pinched hysteresis loops have been obtained up to 3 MHz for both incremental and decremental setups of the proposed fractional-order meminductor emulator. The simulation results were achieved using the LTSpice tool with 180 nm CMOS technology specifications. The suggested meminductor emulator's performance has also been compared to that of existing emulators reported in the literature. To test the effectiveness of the suggested fractional-order meminductor emulator, an adaptive learning circuit has been simulated.

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  1. ECED, Netaji Subhas University of Technology, New Delhi, Delhi, India

    Anshul Gupta & Maneesha Gupta

  2. ECED, Thapar Institute of Engineering and Technology, Patiala, Punjab, India

    Shireesh Kumar Rai

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Gupta, A., Rai, S.K. & Gupta, M. A Fractional-Order Meminductor Emulator Using OTA and CDBA with Application in Adaptive Learning Circuit. Wireless Pers Commun 131, 2675–2696 (2023). https://doi.org/10.1007/s11277-023-10566-2

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