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A novel hardware/software partitioning for SIMD-based real-time AVS video decoder

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Abstract

Decoding high-quality videos in real-time is becoming more and more difficult with the increasing resolution. In this paper, a novel hardware/software (HW/SW) partitioning is proposed with powerful SIMD (single instruction multiple data) instructions for the real-time AVS video decoder. Since most key functions that need large amounts of computations are optimized by SIMD instead of hardware, the distribution of workload between hardware and software is balanceable, and the performance of the video decoder is improved. Besides, the generality and programmability are also maintained. The proposed method is implemented on a 32-bit dual-issue RISC processor with 256-bit vector extension. The experimental results of conformation AVS test sequences show that the video decoder system can support the real-time decoding of AVS 1080p videos at 30 fps, and improve performance over 100 times compared to the original processor without the proposed method. Moreover, this approach could be easily applied to other video decoders, such as H.264 and VC-1.

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Acknowledgments

This work is partially supported by the National Sci&Tech Major Project (No.2009ZX01028-002-003, 2009ZX01029-001-003, 2010ZX01036-001-002), National Natural Science Foundation (No.60921002, 61003064, 61050002, 61070025, 61100163, 61133004, 61173001, 61222204) of China, the National High Technology Development 863 Program of China (2012AA010901,2012AA011002), and the Strategic Priority Research Program of the Chinese Academy of Sciences (under Grant XDA06010401-02).

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Authors and Affiliations

  1. Key Laboratory of Computer System and Architecture, Chinese Academy of Sciences, Beijing, China

    Liwei Chen, Ming Cong, Jing Huang, Ling Li, Hongwei Liu & Cheng Qian

  2. Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

    Liwei Chen, Ming Cong, Jing Huang, Ling Li, Hongwei Liu & Cheng Qian

  3. Graduate University of Chinese Academy of Sciences, Beijing, China

    Liwei Chen, Jing Huang & Hongwei Liu

  4. Loongson Technology Corporation Limited, Beijing, China

    Liwei Chen, Ming Cong, Jing Huang, Ling Li, Hongwei Liu & Cheng Qian

Authors
  1. Liwei Chen
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  2. Ming Cong
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  3. Jing Huang
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  4. Ling Li
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  5. Hongwei Liu
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  6. Cheng Qian
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Corresponding author

Correspondence to Liwei Chen.

Additional information

The basic idea of this paper appeared in the Proceedings of IEEE 7th International Conference on Networking, Architecture and Storage (NAS): L. Chen, M. Cong, J. Huang, L. Li, H. Liu and C. Qian, “A Novel HW/SW Partitioning with SIMD Instructions for AVS Video Decoder” as an extended abstract [2]. In this version, we carry out detailed analysis, and present more performance and power results.

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Chen, L., Cong, M., Huang, J. et al. A novel hardware/software partitioning for SIMD-based real-time AVS video decoder. Multimed Tools Appl 71, 1651–1671 (2014). https://doi.org/10.1007/s11042-012-1296-5

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