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Assessing the impact of the CPU power-saving modes on the task-parallel solution of sparse linear systems

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Abstract

We investigate the benefits that an energy-aware implementation of the runtime in charge of the concurrent execution of ILUPACK—a sophisticated preconditioned iterative solver for sparse linear systems—produces on the time-power-energy balance of the application. Furthermore, to connect the experimental results with the theory, we propose several simple yet accurate power models that capture the variations of average power that result from the introduction of the energy-aware strategies as well as the impact of the P-states into ILUPACK’s runtime, at high accuracy, on two distinct platforms based on multicore technology from AMD and Intel.

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Notes

  1. A ratio of 1 EXAFLOPS=\(10^{18}\) floating-point arithmetic operations, or flops, per second.

  2. On a separate experiment [21], it was determined that the aggregate power supplied by the 3-Volt and 5-Volt lines during the execution of ILUPACK on these two platforms remains practically constant and, furthermore, it is negligible compared with that measured from the 12-Volt lines.

  3. http://manpages.ubuntu.com/manpages/precise/man1/cpuburn.1.html.

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Acknowledgments

The researchers from the Universidad Jaume I were supported by project CICYT TIN2011-23283 of the Ministerio de Ciencia e Innovación and FEDER and the FPU program of the Ministerio de Educación, Cultura y Deporte. A. F. Martín was funded by the Generalitat de Catalunya under the program “Ajuts per a la incorporació, amb caràcter temporal, de personal investigador júnior a les universitats públiques del sistema universitari català PDJ 2013”.

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Authors and Affiliations

  1. Depto. de Ingeniería y Ciencia de Computadores, Universidad Jaume I, 12.071, Castellón de la Plana, Castellón, Spain

    José I. Aliaga, María Barreda, Rafael Mayo & Enrique S. Quintana-Ortí

  2. Department of Informatics, University of Hamburg, 22.527, Hamburg, Germany

    Manuel F. Dolz

  3. Centre Internacional de Mètodes Numèrics a l’Enginyeria (CIMNE), Parc Mediterrani de la Tecnologia, Universitat Politècnica de Catalunya, 08.860, Castelldefels, Spain

    Alberto F. Martín

  4. UPC, Edifici C1, 08.034, Barcelona, Spain

    Alberto F. Martín

Authors
  1. José I. Aliaga
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  2. María Barreda
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  3. Manuel F. Dolz
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  4. Alberto F. Martín
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  5. Rafael Mayo
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  6. Enrique S. Quintana-Ortí
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Corresponding author

Correspondence to Enrique S. Quintana-Ortí.

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Aliaga, J.I., Barreda, M., Dolz, M.F. et al. Assessing the impact of the CPU power-saving modes on the task-parallel solution of sparse linear systems. Cluster Comput 17, 1335–1348 (2014). https://doi.org/10.1007/s10586-014-0402-z

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