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Computing with hysteretic resistor crossbars

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Abstract

An architecture for nano-electronic computation based on crossbars of hysteretic resistors is presented. We show how such crossbars can implement inverting and non-inverting latches and sum-of-product logic functions, and give examples of a NAND gate, exclusive-OR gate, and half adder. Multiple hysteretic resistor crossbars may be combined to implement complex computational systems. The designs have been evaluated using SPICE (a general-purpose circuit simulation program), demonstrating the feasibility of implementation given a suitable nano-electronic substrate.

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Authors and Affiliations

  1. Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA, 94304, USA

    G. Snider

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  1. G. Snider
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Correspondence to G. Snider.

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PACS

85.40.Bh; 85.35.-p; 85.65.+h

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Snider, G. Computing with hysteretic resistor crossbars. Appl. Phys. A 80, 1165–1172 (2005). https://doi.org/10.1007/s00339-004-3149-1

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  • DOI: https://doi.org/10.1007/s00339-004-3149-1

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