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Detecting SDCs in GPGPUs Through Efficient Partial Thread Redundancy

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Algorithms and Architectures for Parallel Processing (ICA3PP 2023)

Abstract

As General-Purpose Graphics Processing Units (GPGPUs) are widely employed in various precision-sensitive and safety-critical domains, guaranteeing the execution reliability of such applications under the impact of soft errors becomes a critical issue. Redundant Multi-Threading (RMT) provides a potentially low-cost mechanism for improving GPGPU reliability, but full protection comes with high time and resource costs. In this paper, we propose a partial thread protection mechanism for efficient Silent Data Corruption (SDC) detection in GPGPU programs. Firstly, we establish an accurate and efficient model for assessing the thread SDC vulnerability by capturing intra-thread error propagation and inter-thread error propagation. Then, based on the analysis results, we selectively replicate the SDC vulnerable threads. Experimental results indicate that our proposed thread SDC vulnerability assessment model closely aligns with the fault injection results, while introducing much lower execution overhead. Our partial thread redundancy mechanism provides a better trade-off between reliability and overhead compared with full RMT.

This work is supported by the National Natural Science Foundation of China (NSFC) (Grants No. 62272190, No. 62302190 and No. U19A2061).

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Correspondence to Nan Jiang or Hengshan Yue .

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Wei, X., Wu, Y., Jiang, N., Yue, H. (2024). Detecting SDCs in GPGPUs Through Efficient Partial Thread Redundancy. In: Tari, Z., Li, K., Wu, H. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2023. Lecture Notes in Computer Science, vol 14493. Springer, Singapore. https://doi.org/10.1007/978-981-97-0862-8_14

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  • DOI: https://doi.org/10.1007/978-981-97-0862-8_14

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  • Online ISBN: 978-981-97-0862-8

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