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PCIe-Based Multi-node Efficient Interconnection Mechanism Design

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Advances in Guidance, Navigation and Control (ICGNC 2024)

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 1349))

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Abstract

In order to meet the requirements of performance heterogeneous computing systems, intelligent systems, and data centers for low-latency, high-throughput, and low-overhead data resource sharing capabilities, a PCIe-based multi-node efficient interconnection mechanism was proposed. We propose a PCIe-based interconnection framework, and adopt the native PCIe switching channel and cross-node efficient interconnection mechanism to design and implement the functions of memory sharing, reflective memory, RDMA and other functions between distributed heterogeneous node device resources. The proposed interconnection mechanism is able to ensure the efficient flow of batch data between different task nodes, and maximize the efficiency of equipment resource collaboration within the potential area. In the final performance analysis, the proposed PCIe-based multi-node efficient interconnection mechanism is tested, and the RDMA data transmission rate can reach 48.65 Gb/s with x8 lanes, which is better than the transmission bandwidth of Ethernet.

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Correspondence to Zhenpeng Xu .

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Xu, Z., Xianyu, Y., Xia, C. (2025). PCIe-Based Multi-node Efficient Interconnection Mechanism Design. In: Yan, L., Duan, H., Deng, Y. (eds) Advances in Guidance, Navigation and Control. ICGNC 2024. Lecture Notes in Electrical Engineering, vol 1349. Springer, Singapore. https://doi.org/10.1007/978-981-96-2248-1_52

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