Embedded Reconfigurable Architectures

ERA (Embedded Reconfigurable Architectures) is a 3-year project funded by the EU under the FP7 framework programme (starting January 2010). The ERA project addresses issues rising from a scenario in which the complexity and diversity of embedded systems is rising and causing extra pressure in the demand for performance at the lowest possible power budget and in which designers face the challenges brought by the power and memory walls in the production of embedded platforms. The focus of the ERA project is to investigate and propose new methodologies in both tools and hardware design to break through these walls and help design the next-generation embedded systems platforms. The proposed strategy is to utilize adaptive hardware to provide the highest possible performance with limited power budgets. The envisioned adaptive platform employs a structured design approach that allows integration of varying computing elements, networking elements, and memory elements. More precisely, we focused on the dynamic adaptation of our platform (of the computing, networking and memory elements) to the software requirements and the operating environment targeting performance, power/energy, and resource availability.

Authors and Affiliations

1. Computer Engineering Laboratory, Delft University of Technology, The Netherlands

   Stephan Wong

Editors and Affiliations

1. Department of Computer Science and Engineering, University of California, 92521, Riverside, CA, USA

   Philip Brisk

2. Department of Computing, Imperial College, SW7 2AZ, London, UK

   José Gabriel de Figueiredo Coutinho

3. Departamento de Engenharia Informática, Instituto Superior Técnico/INESC-ID, Av. Prof. Dr. Cavaco Silva, 2780-990, Porto Salvo, Portugal

   Pedro C. Diniz

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