Abstract
Managing extremely large amounts of data with high performance and low power consumption is very difficult. We look at this urgent problem from an architectural perspective and present our prototype design and implementation of a three-layer database storage system, which uses flash-based devices as an intermediate caching layer. The flash-based layer significantly improves the I/O efficiency of the storage system. Therefore, we can reduce the use of energy-inefficient RAM-based memory without compromising the overall system performance. The efficiency of the three-layer storage system is demonstrated by our practical experiments using traces from both standard benchmarks and a real-life application.
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References
Spiegel. Google-chef will noch mehr daten (2010), http://www.spiegel.de/netzwelt/netzpolitik/0,1518,716204,00.html
Härder, T.: DBMS architecture - the layer model and its evolution. Datenbank-Spektrum 13, 45–57 (2005)
Zhou, Y., Chen, Z., et al.: Second-level buffer cache management. IEEE Transactions on Parallel and Distributed Systems 15(6), 505–519 (2004)
Koltsidas, I., Viglas, S.D.: The case for flash-aware multi-level caching. Technical Report (2009)
Narayanan, D., Thereska, E., et al.: Migrating server storage to SSDs: analysis of tradeoffs. In: EuroSys, pp. 145–158. ACM, New York (2009)
Gray, J., Reuter, A.: Transaction Processing: Concepts and Techniques. Morgan Kaufmann, San Francisco (1993)
Gal, E., Toledo, S.: Algorithms and data structures for flash memories. ACM Computing Surveys (CSUR) 37(2), 138–163 (2005)
O’Neil, E.J., O’Neil, P.E., et al.: The LRU-K page replacement algorithm for database disk buffering. In: SIGMOD, pp. 297–306 (1993)
Johnson, T., Shasha, D., et al.: 2Q: a low overhead high performance buffer management replacement algorithm. In: VLDB, pp. 439–450 (1994)
Megiddo, N., Modha, D.S.: ARC: A self-tuning, low overhead replacement cache. In: FAST. USENIX (2003)
Li, Z., Jin, P., et al.: CCF-LRU: A new buffer replacement algorithm for flash memory. Trans. on Cons. Electr. 55, 1351–1359 (2009)
Ou, Y., Härder, T.: Clean first or dirty first? a cost-aware self-adaptive buffer replacement policy. In: IDEAS, Montreal, QC, Canada (2010)
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Ou, Y., Härder, T. (2011). Trading Memory for Performance and Energy. In: Xu, J., Yu, G., Zhou, S., Unland, R. (eds) Database Systems for Adanced Applications. DASFAA 2011. Lecture Notes in Computer Science, vol 6637. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-20244-5_24
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DOI: https://doi.org/10.1007/978-3-642-20244-5_24
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-20243-8
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