Abstract
This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits with the high-level structural circuit design of JHDL. Furthermore, the JHDLBits flow provides greater control of resource manipulation, placement, and routing, and gives researchers a “sandbox” to explore advanced interactions with FPGA bitstreams. This paper presents the overall architecture of the open-source JHDLBits project. Details are provided on how the core components – JHDL, JBits3 for Virtex-II, and the ADB connectivity database – are linked together to provide a cohesive design environment.
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Poetter, A., Hunter, J., Patterson, C., Athanas, P., Nelson, B., Steiner, N. (2004). JHDLBits: The Merging of Two Worlds. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_43
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DOI: https://doi.org/10.1007/978-3-540-30117-2_43
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