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Do Not Rely on Clock Randomization: A Side-Channel Attack on a Protected Hardware Implementation of AES

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Foundations and Practice of Security (FPS 2022)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 13877))

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Abstract

Clock randomization is one of the oldest countermeasures against side-channel attacks. Various implementations have been presented in the past, along with positive security evaluations. However, in this paper we show that it is possible to break countermeasures based on a randomized clock by sampling side-channel measurements at a frequency much higher than the encryption clock, synchronizing the traces with pre-processing, and targeting the beginning of the encryption. We demonstrate a deep learning-based side-channel attack on a protected FPGA implementation of AES which can recover a subkey from less than 500 power traces. In contrast to previous attacks on FPGA implementations of AES which targeted the last round, the presented attack uses the first round as the attack point. Any randomized clock countermeasure is significantly weakened by an attack on the first round because the effect of randomness accumulated over multiple encryption rounds is lost.

M. Brisfors and M. Moraitis—Both authors contributed equally to this manuscript.

This work was supported in part by the research grant 2021-02426 from Vinnova, the research grant 2020-11632 from the Swedish Civil Contingencies Agency, and the Vinnova Competence Center for Trustworthy Edge Computing Systems and Applications at KTH Royal Institute of Technology.

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Notes

  1. 1.

    Note that \(_nC_r\) is an alternative notation of \(n \atopwithdelims ()r\).

  2. 2.

    An alternative design with dynamically reconfigurable MMCMs is mentioned, but not implemented.

  3. 3.

    A BUFGMUX_CTRL is a Global Clock Control Buffer (BUFGCTRL) with the clock enable (CE) inputs set to constant 1 and select inputs (S) connected to the selection signal. When the select signal is connected to the CE inputs, the glitch-free functionality is lost and the switching occurs asynchronously.

  4. 4.

    The Nyquist rate is defined as twice the bandwidth of the signal.

  5. 5.

    Here by “typical” we mean the AES implementation in which one round is computed per clock cycle and the state is stored at the end of the round.

  6. 6.

    The cumulative effect of randomness can be described by a random walk, and the variance of a random walk increases with the walk length. Thus, if the timing shifts are randomly distributed, the uncertainty in the first round is provably smaller than the uncertainty in the last.

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Brisfors, M., Moraitis, M., Dubrova, E. (2023). Do Not Rely on Clock Randomization: A Side-Channel Attack on a Protected Hardware Implementation of AES. In: Jourdan, GV., Mounier, L., Adams, C., Sèdes, F., Garcia-Alfaro, J. (eds) Foundations and Practice of Security. FPS 2022. Lecture Notes in Computer Science, vol 13877. Springer, Cham. https://doi.org/10.1007/978-3-031-30122-3_3

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  • DOI: https://doi.org/10.1007/978-3-031-30122-3_3

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