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Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research

  • Devices and Systems
  • Conference paper
  • First Online:
Field-Programmable Logic and Applications (FPL 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1304))

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Abstract

The paper proposes a number of requirements for an ideal platform for codesign research. Riley-2, a new platform developed at Imperial College, is shown to meet these requirements. It is a PCI based board consisting mainly of four dynamically reconfigurable FPGAs and an embedded processor. A VHDL model of the Riley-2 system, including all major components except the PCI interface, has been produced. Two design routes, one based on VHDL with parametrised hardware libraries and the other based on a codesign language called Cedar, have been developed for Riley-2. Finally, an image processing application running on a PC with the Riley-2 and a Quickcam camera, is described.

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References

  1. Steve Guccione, “List of FPGA-based Computing Machines”, on the web, URL: http://www.io.com/-guccione/HW list.html

    Google Scholar 

  2. P.Y.K. Cheung, W. Luk, Patrick Mackinlay, “Hardware Cosynthesis for the Riley System”, IEE Colloquium Disgest on Hardware-software cosynthesis for reconfigurable systems, Febuary 22, 1996.

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  3. W. Luk, N. Shirazi and P.Y.K. Cheung, “Modelling and optimising run-time reconfigurable systems”, in Proc. IEEE Symposium on FPGAs for Custom Computing Machines, 1996.

    Google Scholar 

  4. The programmable logic data book published by XILINX.

    Google Scholar 

  5. i960RP Users Manual.

    Google Scholar 

  6. W. Luk, N. Shirazi and P.Y.K. Cheung, “Compilation tools for run-time reconfigurable designs”, in Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, K.L. Pocek and J. Arnold (editors), IEEE Computer Society Press, 1997.

    Google Scholar 

  7. W. Luk, S. Guo, N. Shirazi and N. Zhuang, “A framework for developing parametrised FPGA libraries”, in Field-ProgrammableLogic,Smart Applications, New Paradigms and Compilers, R.W. Hartenstein and M. Glesner (editors), LNCS 1142, Springer, 1996, pp. 24–33.

    Google Scholar 

  8. I. Page and W. Luk, “Compiling occam into FPGAs, in FPGAs”, W. Moore and W. Luk (editors), Abingdon EE&CS Books, 1991, pp. 271–283.

    Google Scholar 

  9. G. Brown, W. Luk and J.W. O'Leary, “Retargeting a hardware compiler using protocol converters”, Formal Aspects of Computing, Vol. 8, 1996, pp. 209–237

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Wayne Luk Peter Y. K. Cheung Manfred Glesner

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© 1997 Springer-Verlag Berlin Heidelberg

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Mackinlay, P.I., Cheung, P.Y.K., Luk, W., Sandiford, R. (1997). Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_214

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  • DOI: https://doi.org/10.1007/3-540-63465-7_214

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63465-2

  • Online ISBN: 978-3-540-69557-8

  • eBook Packages: Springer Book Archive

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