[go: up one dir, main page]
More Web Proxy on the site http://driver.im/
Skip to main content
Springer Nature Link
Log in

Use of reconfigurability in variable-length code detection at video rates

  • Reconfigurable Designs and Models
  • Conference paper
  • First Online:
Field-Programmable Logic and Applications (FPL 1995)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 975))

Included in the following conference series:

Abstract

This paper shows how properties of the data produced by a particular compression scheme lead to an elegant paged logic implementation of a decoder. The implementation uses the new Xilinx XC6200 FPGA family, which supports dynamic use of programmable logic with special hardware. The work illuminates an eternal verity of computing that, when a resource is limited, its use can be extended by paging. In this case, the resource is logic.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Cormen, Leiserson and Rivest, Introduction to Algorithms, MIT Press 1990, pp.337–344.

    Google Scholar 

  2. Eldredge and Hutchings, “RRANN: A HArdware Implementation of the Backpropagation Algorithm Using Reconfigurable FPGAs,” Proc. IEEE International Conference on Neural Networks, 1994.

    Google Scholar 

  3. International Telecommunication Union, “ITU-T Recommendation T.4: Standardization of Group 3 Facsimile Apparatus for Document Transmission,” ITU Geneva 1993.

    Google Scholar 

  4. Ling and Amano, “WASMII: a Data Driven Computer on a Virtual Hardware,” Proc. IEEE Workshop on FPGAs for Custom Computing Machines, 1993.

    Google Scholar 

  5. Lysaght, Stockwood, Law and Girma, “Artificial Neural Network Implementation on a Fine-grained FPGA,” Proc. 4th International Workshop on Field-Programmable Logic and Applications, 1994.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science, University of Edinburgh, Mayfield Road, EH9 3JZ, Edinburgh, Scotland

    Gordon Brebner

  2. Xilinx Development Corporation, 52 Mortonhall Gate, EH 16 6TJ, Edinburgh, Scotland

    John Gray

Authors
  1. Gordon Brebner
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. John Gray
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Will Moore Wayne Luk

Rights and permissions

Reprints and permissions

Copyright information

© 1995 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Brebner, G., Gray, J. (1995). Use of reconfigurability in variable-length code detection at video rates. In: Moore, W., Luk, W. (eds) Field-Programmable Logic and Applications. FPL 1995. Lecture Notes in Computer Science, vol 975. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60294-1_137

Download citation

  • DOI: https://doi.org/10.1007/3-540-60294-1_137

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-60294-1

  • Online ISBN: 978-3-540-44786-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation