Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic

1. P. A. Kaufmann: Wanted: Tools for Validation, Iteration; Computer Design, December 1989

   Google Scholar 

2. M. D'Amour, et al.: ASIC Emulation cuts Design Risc; High Performance Systems, October 1989

   Google Scholar 

3. L. Lindh, K. D. Müller-Glaser, H. Rauch: A Real Time Kernel — Rapid Prototyping With VHDL and FPGAs; (submitted for this workshop)

   Google Scholar 

4. I. Buchanan, T. A. Kean: The Use of FPGAs in a Novel Computing Subsystem; Proc. 1st Int'l ACM/SIGDA Workshop on Field-programmable Logic, Berkeley, CA, 1992

   Google Scholar 

5. P. Bertin, D. Roncin, J. Vuillemin: Introduction to Programmable Active Memories; Proc. 3rd Int'l Conf. on Systolic Arrays, Kilarney, Ireland, May 1989.

   Google Scholar 

6. J. P. Gray, T. A. Kean: Configurable Hardware: A New Paradigm for Computation; in: (ed.) C. L. Seitz: Advanced Research in VLSI; MIT Press, 1989

   Google Scholar 

7. R.W. Hartenstein, A.G. Hirschbiel, M.Weber: A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; CONPAR '90 — VAPP IV, Zürich, Schweiz, Sept. 1990.

   Google Scholar 

8. R. W. Hartenstein, A. G. Hirschbiel, M. Riedmüller, K. Schmidt, M. Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24 Hawaii International Conference on System Sciences, Poipu, Koloa, Hawaii, USA, January 1991

   Google Scholar 

9. R. W. Hartenstein, A. G. Hirschbiel, M. Weber: MoM — Map Oriented Machine; in: Ambler et al.: (Preprints Int'l Workshop on) Hardware Accelerators, Oxford 1987, Adam Hilger, Bristol 1988

   Google Scholar 

10. R. Hartenstein, A.G. Hirschbiel, M.Weber: The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration; 1990 Int'l Conf. on Parallel Processing, St. Charles, Ill, USA, Aug 1990.

    Google Scholar 

11. M. Weber: An Application Development Method for Xputers; Ph. D. dissertation, Fachbereich für Informatik, Universität Kaiserslautern, December 1990

    Google Scholar 

12. A. G. Hirschbiel: A Novel Processor Architecture based on Auto Data Sequencing and Low Level Parallelism; Ph. D. dissertation, Fachbereich für Informatik, Universität Kaiserslautern, 1991

    Google Scholar 

13. R. W. Hartenstein, K. Schmidt, H. Reinig, M. Weber: A Novel Compilation Technique for a Machine Paradigm Based on Field-Programmable Logic; in Will Moore, Wayne Luk (ed.): FPGAs; Abingdon EE&CS Books, Abingdon, 1991; revised reprint from: Proc. Int'l Workshop on Field Programmable Logic and Applications, Oxford, UK 1991

    Google Scholar 

14. R. W. Hartenstein, A. G. Hirschbiel, M. Weber: MoM — Map Oriented Machine, in: Chiricozzi, D'Amico: Parallel Processing and Applications, North Holland, Amsterdam / New York 1988.

    Google Scholar 

15. R. Hartenstein, A. Hirschbiel, K. Lemmert, M. Riedmüller, K. Schmidt, M. Weber: Xputer Use in Image Processing and Digital Signal Proccessing; SPIE (Soc. of Photo-optical Instrumentation Engineers) Conf. on Visual Communication and Image Processing, Lausanne, Switzerland, 1990

    Google Scholar 

16. R.W. Hartenstein, A.G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber: Automatic Synthesis of Cheap Hardware Accelerators for Signal Processing and Image Preprocessing; 12. DAGM-Symposium Mustererkennung, Oberkochen-Aalen, September 1990.

    Google Scholar 

17. R.W. Hartenstein, A.G. Hirschbiel, M. Weber: The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration; in: Deprettre (ed.): Algorithms and Parallel Architecture; North Holland, Amsterdam, 1991

    Google Scholar 

18. R.W. Hartenstein, A.G. Hirschbiel, M.Weber: Using Xputers as Universal Accelerators for Neuro Network Simulation and its Applications; Int'l Neural Network Conference, INNC 90, Paris, France, July 1990.

    Google Scholar 

19. R. Hartenstein, A. Hirschbiel, H. Riedmüller, K. Schmidt, M. Weber: A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; Info-Japan (International Conference on Information Technology), Tokyo, Japan, Oct. 1990

    Google Scholar 

20. R. W. Hartenstein, H. Reinig, M. Riedmüller, K. Schmidt: A Novel Computational Paradigm: Much More Efficient Than Von Neumann Principles; 13th IMACS World Congress, Dublin Ireland, July 1991

    Google Scholar 

21. R.W. Hartenstein, A.G. Hirschbiel, M. Weber: Xputers — An Open Family of Non von Neumann Architectures; Proc. of 11th ITG/GI-Conference: Architektur von Rechensystemen, München, März 1990, VDE-Verlag, Berlin, 1990.

    Google Scholar 

22. R. Hartenstein, A. Hirschbiel, M. Weber: MoM — a partly Custom-Designed Architecture compared to Standard Hardware; Proc. IEEE Comp Euro '89, Hamburg, FRG, IEEE Press, Washington, DC, 1989

    Google Scholar 

23. R. W. Hartenstein, A. G. Hirschbiel, M. Riedmüller, K. Schmidt, M. Weber: A Novel ASIC Design Approach Based on a New Machine Paradigm; IEEE Journal of Solid-State Circuits, Vol. 26, No. 7, pp. 975–989, July 1991; revised reprint from: Proc. ESSCIRC — European Solid-State Circuits Conference '90, Grenoble, Frankreich, September 1990

    Google Scholar 

24. A. Ast, et al.: Using Xputers as Inexpensive Universal Accelerators in Digital Signal Processing; BILCON Int'l Conf. on New Trends in Signal Processing, Communication and Control, Ankara, Turkey, July 1990, North Holland, Amsterdam 1990

    Google Scholar 

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