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Proceedings / Parcella 1988

Fourth International Workshop on Parallel Processing by Cellular Automata and Arrays, Berlin, GDR, October 17-21, 1988

  • Conference proceedings
  • © 1989

Overview

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 342)

Included in the following conference series:

Conference proceedings info: Parcella 1988.

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About this book

This volume contains selected papers for the Parcella '88, the Fourth International Workshop on "Parallel Processing by Cellular Automata and Arrays" held in Berlin from October 17 to 21, 1988. The profile of the Parcella workshop series is focused on problems of processing by regular structures, i.e. their "flexibilization" or adapting to "irregular" algorithms and, closely related to this, on the "regularization" of algorithms for their embedding into regular structures. It seems that these problems will have an increasing priority within the list of central problems in parallelization and will determine the profile of Parcella for the next years.

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Keywords

Table of contents (33 papers)

Other volumes

  1. Parcella '88

Bibliographic Information

  • Book Title: Proceedings / Parcella 1988

  • Book Subtitle: Fourth International Workshop on Parallel Processing by Cellular Automata and Arrays, Berlin, GDR, October 17-21, 1988

  • Editors: Gottfried Wolf, Tamáas Legendi, Udo Schendel

  • Series Title: Lecture Notes in Computer Science

  • DOI: https://doi.org/10.1007/3-540-50647-0

  • Publisher: Springer Berlin, Heidelberg

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer-Verlag Berlin Heidelberg 1989

  • Softcover ISBN: 978-3-540-50647-8Published: 19 April 1989

  • eBook ISBN: 978-3-540-46062-6Published: 30 June 2005

  • Series ISSN: 0302-9743

  • Series E-ISSN: 1611-3349

  • Edition Number: 1

  • Number of Pages: II, 381

  • Additional Information: Jointly published with Akademie-Verlag Berlin

  • Topics: Computer System Implementation, Computation by Abstract Devices, Programming Techniques, Processor Architectures

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