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UV-programmable Floating-Gate CMOS Linear Threshold Element ”P1N3”

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Artificial Neural Nets Problem Solving Methods (IWANN 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2687))

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Abstract

We present some aspects regarding modelling of floating-gate UV-programmable (FGUVMOS) circuits when used as linear threshold elements, with a simple building block used for generation of Boolean functions as an example. Some comparisons with other floating gate and standard cell CMOS implementations are also done. A new FULLADDER structure containing only eight transistors is demonstrated by SPICE simulations, using a power supply voltage of 0.8 V. We argue that the floating-gate linear threshold elements have a significant ultra low-power potential and may allow very simple circuitry, provided that the technology can prove to reach adequate maturity.

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© 2003 Springer-Verlag Berlin Heidelberg

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Aunet, S., Berg, Y. (2003). UV-programmable Floating-Gate CMOS Linear Threshold Element ”P1N3”. In: Mira, J., Álvarez, J.R. (eds) Artificial Neural Nets Problem Solving Methods. IWANN 2003. Lecture Notes in Computer Science, vol 2687. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44869-1_8

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  • DOI: https://doi.org/10.1007/3-540-44869-1_8

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40211-4

  • Online ISBN: 978-3-540-44869-3

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