Abstract
MPSoC are attractive candidate architectures for multimedia processing as multimedia schemes generally can be partitioned in control-oriented and data-dominated functions, which can all be processed in parallel on different cores. This paper presents a heterogeneous embedded MPSoC for a wide range of application fields with particularly high processing demands. It integrates three processor cores and various interfaces onto a single chip, all tied to a 32-bit AMBA AHB bus. The RISC core coordinates the system and performs some reactive tasks, and the cluster composed by two DSP cores perform transformational tasks with more deterministic and regular behaviors, such as the small and well-defined workloads in multimedia signal processing applications. The DSP cores are designed based on Transport Triggered Architecture (TTA) to reduce hardware complexity, get high flexibility and shorten market time. The processor is fabricated in 0.18um standard-cell technology, occupies about 21.4mm2, and operates at 266MHz while consuming 870mW average power.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Levy, M.: ARM picks up performance. Microprocessor Report (4/7/03-01)
Quinnell, R.A.: Logical combination? Convergence products need both RISC and DSP processors, but merging them may not be the answer. EDN (1/23/2003)
OMAP5910 Dual Core Processor – Technical Reference Manual, Texas Instruments (January 2003)
Siemens: TriCore Architecture. White Paper (1998)
Stolberg, H.-J., et al.: HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. In: Proc. DATE 2003, p. 20008 (March 2003)
Berekovic, M., Stolberg, H.-J., Kulaczewski, M.B., Pirsch, P., et al.: Instruction set extensions for MPEG-4 video. J. VLSI Signal Processing Syst. 23, 27–50 (1999)
ARM Ltd. AMBA Specification Rev. 2.0 [Online], available: www.arm.com
Corporaal, H.: Microprocessor Architecture from VLIW to TTA. John Wiley & Sons Ltd., West Sussex, England (1998)
Hoogerbrugge, J.: Code Generation for Transport Triggered Architecture. PhD Thesis, Delft University of Technology, Delft, The Netherlands (1996)
Yue, H., Dai, K., Wang, Z.: Key Technique of Float Point Function Unit Implementation based on CORDIC Algorithm. In: Proc. Annual Conference of Engineer and Technology of China, pp. 102–105 (April 2005)
Rixner, S., Dally, W.J., Khailany, B., Mattson, P., et al.: Register organization for media processing. In: Proc. HPCA-6, pp. 375–386 (2000)
MS320C64x DSP Library Programmer’s Reference, Texas Instruments Inc. (April 2002)
TMS320C55x DSP Programmer’s Guide, Texas Instruments Inc. (July 2000)
Kumura, T., Ikekawa, M., Yoshida, M., Kuroda, I.: VLIW DSP for mobile applications. IEEE Signal Processing Mag., 10–21 (July 2002)
Ye, T.T.: On-chip multiprocessor communication network design and analysis. PhD thesis, Stanford University (December 2003)
TTay-Jyi, L., Chie-Min, C.: A Unified Processor Architecture for RISC&VLIW DSP. In: GLSVLSI 2005 (2005)
Yue, H., Dai, K., Wang, Z.: A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications. In: Azar, Y., Erlebach, T. (eds.) ESA 2006. LNCS, vol. 4168. Springer, Heidelberg (2006)
Wu, M.-Y., Gajski, D.D.: Hypertool: A programming aid for message-passing systems. IEEE Trans. Parallel & Distrib. Systems 1(3), 330–343 (1990)
Yue, H., Dai, K., Wang, Z., Zhao, X.: An instruction customization algorithm for embedded application-specific heterogeneous multiprocessor. Journal of Computer Research and Development (being in reviewing)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Yue, H., Wang, Z., Dai, K. (2006). A Heterogeneous Embedded MPSoC for Multimedia Applications. In: Gerndt, M., Kranzlmüller, D. (eds) High Performance Computing and Communications. HPCC 2006. Lecture Notes in Computer Science, vol 4208. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11847366_61
Download citation
DOI: https://doi.org/10.1007/11847366_61
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-39368-9
Online ISBN: 978-3-540-39372-6
eBook Packages: Computer ScienceComputer Science (R0)