Abstract
This work presents a methodology for low-power embedded software design to mass-produced microprocessors. It is based on identifying the frequently accessed loops from the application program and to build a loop table in already present on-chip memory of standard microcontroller. By using the loop table, the loops are accessed from the on-chip memory and not any longer from a power expensive memory bus. Results based on benchmarks show a considerable reduction in power, without penalties in area or performance.
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Possamai Bastos, R., Lima Kastensmidt, F., Reis, R. (2005). Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. In: Paliouras, V., Vounckx, J., Verkest, D. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2005. Lecture Notes in Computer Science, vol 3728. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11556930_7
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DOI: https://doi.org/10.1007/11556930_7
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