Abstract
Field Programmable Gate Arrays (FPGAs) are being used as platforms for the digital implementation of intelligent systems. Binary digital systems provide an accurate, robust, stable performance that is free from the drift and manufacturing tolerances associated with analogue systems. However binary systems have a much lower functional density than their analogue counterparts resulting in inefficient use of silicon surface area. A design for a novel Configurable Logic Block (CLB) is presented which retains the robust qualities of digital processing whilst providing increased functional density. The circuit design uses Si/SiGe Inter-band Tunneling Diodes (ITDs) and NMOS/CMOS transistors to create quaternary memory cells in a topology and architecture suited to the implementation of neural networks. The performance of the CLB is simulated in HSPICE and the results are presented.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Van Der Wagt, P.: JPA Tunnelling-Based SRAM. Proceedings of the IEEE 87(4) (April 1999)
Seabaugh, A., Brar, B., Broekaert, T., Frazier, G., Morris, F., van der wagt, P., Beam III, E.: Resonant tunneling Circuit Technology: Has it Arrived? In: Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, Technical Digest 1997, 19th Annual, October 15-17, pp. 119–122 (1997)
Kelly, P.M., Thompson, C.J., McGinnity, T.M., Maguire, L.P.: Investigation of a Programmable Threshold Logic Gate Array. In: IEEE International Conference Electronics Circuits and Systems, proceedings, vol. II, pp. 673–767 (September 2002)
Prost, W., Auer, U., Tegude, F.-J., Pacha, C., Goser, K.F., Janssen, G., van der Roer, T.: Manufacturability and Robust Design of Nanoelectronic Logic Circuits Based on Resonant Tunnelling Diodes. Int. J. Circ. Theor. Appl. 28, 537–552 (2000)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Kelly, P.M., McGinnity, T.M., Maguire, L.P., McDaid, L.M. (2005). A Quaternary CLB Design Using Quantum Device Technology on Silicon for FPGA Neural Network Architectures. In: Cabestany, J., Prieto, A., Sandoval, F. (eds) Computational Intelligence and Bioinspired Systems. IWANN 2005. Lecture Notes in Computer Science, vol 3512. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11494669_69
Download citation
DOI: https://doi.org/10.1007/11494669_69
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-26208-4
Online ISBN: 978-3-540-32106-4
eBook Packages: Computer ScienceComputer Science (R0)