An efficient hardware design for HDTV H.264/AVC encoder

• Chang, T.C., Chen, J.W., Su, C.L., Yang, Y.C., Li, Y., Chang, C.H., Chen, Z.M., Yang, W.S., Lin, C.C., Chen, C.W., et al., 2007. A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip. IEEE Int. Solid-State Circuits Conf., p.280–281. [doi:10.1109/ISSCC.2007.373403]

• Chen, T.C., Chien, S.Y., Huang, Y.W., Tsai, C.H., Chen, C.Y., Chen, T.W., Chen, L.G., 2006. Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder. IEEE Trans. Circ. Syst. Video Technol., 16(6):673–688. [doi:10.1109/TCSVT.2006.873163]

  Article  Google Scholar 

• Chen, Y.H., Chuang, T.D., Chen, Y.J., Li, C.T., Hsu, C.J., Chien, S.Y., Chen, L.G., 2008. An H.264/AVC Scalable Extension and High Profile HDTV 1080p Encoder Chip. IEEE Symp. on VLSI Circuits, p.104–105. [doi:10.1109/VLSIC.2008.4585969]

• Huang, Y.W., Chen, T.C., Tsai, C.H., Chen, C.Y., Chen, T.W., Chen, C.S., Shen, C.F., Ma, S.Y., Wang, T.C., Hsieh, B.Y., et al., 2005. A 1.3TOPS H.264/AVC Single-Chip Encoder for HDTV Applications. IEEE Int. Solid-State Circuits Conf., p.128–133. [doi:10.1109/ISSCC.2005.1493902]

• ITU-T, 2005. ITU-T Recommendation and International Standard of Joint Video Specification. H.264/ISO/IEC 14496-10 AVC.

• Lee, K.H., Alshina, E., Park, J.H., Han, W.J., Min, J.H., 2008. Technical Considerations for Ad Hoc Group on New Challenges in Video Coding Standardization. MPEG Doc. M15580. Hannover, Germany.

• Lin, Y.K., Lin, C.C., Kuo, T.Y., Chang, T.S., 2008a. A hardware-efficient H.264/AVC motion-estimation design for high-definition video. IEEE Trans. Circ. Syst. I, 55(6):1526–1535. [doi:10.1109/TCSI.2008.916681]

  Article  MathSciNet  Google Scholar 

• Lin, Y.K., Li, D.W., Lin, C.C., Kuo, T.Y., Wu, S.J., Tai, W.C., Chang, W.C., Chang, T.S., 2008b. A 242mW, 10mm² 1080p H.264/AVC High Profile Encoder Chip. 45th ACM/IEEE Design Automation Conf., p.78–83.

• Liu, Z.Y., Song, Y., Shao, M., Li, S., Li, L.Y., Ishiwata, S., Nakagawa, M., Goto, S., Ikenaga, T., 2009. HDTV1080p H.264/AVC encoder chip design and performance analysis. IEEE J. Sol.-State Circ., 44(2):594–608. [doi:10.1109/JSSC.2008.2010797]

  Article  Google Scholar 

• Park, S.H., Lee, J.H., 2008. Hardware Architecture for Real-Time HD(1920×1080@60fps) H.264/AVC Intra Prediction. IEEE Int. Symp. on Consumer Electronics, p.1. [doi:10.1109/ISCE.2008.4559505]

• Wiegand, T., Schwarz, H., Joch, A., Kossentini, F., Sullivan, G.J., 2003. Rate-constrained coder control and comparison of video coding standards. IEEE Trans. Circ. Syst. Video Technol., 13(7):688–703. [doi:10.1109/TCSVT.2003.815168]

  Article  Google Scholar 

• Yang, C.Q., Goto, S., Ikenaga, T., 2006. High Performance VLSI Architecture of Fractional Motion Estimation in H.264 for HDTV. Proc. IEEE Int. Symp. on Circuits and Systems, p.1–4. [doi:10.1109/ISCAS.2006.1693157]

Download references