2012 Volume E95.C Issue 10 Pages 1589-1597
This paper proposes a low-phase-noise ring-VCO-based frequency multiplier with a new subharmonic direct injection locking technique that only uses a time-delay cell and four MOS transistors. Since the proposed technique behaves as an exclusive OR and can double the reference signal frequency, it increases phase correction points and achieves low phase noise characteristic across the wide output frequency range. The frequency multiplier was fabricated by using 65nm Si CMOS process. Measured 1-MHz-offset phase noise at 6.34GHz with reference signals of 528MHz was -119dBc/Hz.