LETTER
Multi-chip phase synchronization circuit of fractional-N PLL
2023 Volume 20 Issue 9 Pages 20230035
Details
2023 Volume 20 Issue 9 Pages 20230035
A digital integrated circuit to realize multi-chip phase synchronization of fractional-N PLL with local oscillator divider is designed. An offset of fractional frequency ratio is added in phase difference calculation, which effectively avoids the large calculation error under some special fractional frequency ratios. Different from traditional one-time synchronization, a synchronization method with tracking mode is proposed, which can further reduce the phase error. The test result of the chip finished in 65nm COMS shows that the method of tracking mode and adding the fractional frequency ratio’s offset are effective to reduce the error of phase synchronization to about 0.2°.