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Jian Kuang 0001
Person information
- affiliation: The Chinese University of Hong Kong
Other persons with the same name
- Jian Kuang — disambiguation page
- Jian Kuang 0002 — Beijing University of Posts & Telecommunications, Beijing Key Laboratory of Intelligent Telecommunication Software & Multimedia, China
- Jian Kuang 0003 — Sun Yat-Sen University, School of Information Science and Technology, Guangzhou, China
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2020 – today
- 2023
- [j9]Jingsong Chen, Jian Kuang, Guowei Zhao, Dennis J.-H. Huang, Evangeline F. Y. Young:
PROS 2.0: A Plug-In for Routability Optimization and Routed Wirelength Estimation Using Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 164-177 (2023) - 2020
- [j8]Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu:
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5069-5082 (2020) - [c17]Jingsong Chen, Jian Kuang, Guowei Zhao, Dennis J.-H. Huang, Evangeline F. Y. Young:
PROS: A Plug-in for Routability Optimization applied in the State-of-the-art commercial EDA tool using deep learning. ICCAD 2020: 17:1-17:8
2010 – 2019
- 2019
- [j7]Jian Kuang, Evangeline F. Y. Young:
Fixed-Parameter Tractable Algorithms for Optimal Layout Decomposition and Beyond. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1731-1743 (2019) - 2018
- [j6]Jian Kuang, Junjie Ye, Evangeline F. Y. Young:
STOMA: Simultaneous Template Optimization and Mask Assignment for Directed Self-Assembly Lithography With Multiple Patterning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1251-1264 (2018) - [j5]Gengjie Chen, Chak-Wa Pui, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Evangeline F. Y. Young, Bei Yu:
RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2022-2035 (2018) - [j4]Jian Kuang, Evangeline F. Y. Young, Bei Yu:
CRMA: Incorporating Cut Redistribution With Mask Assignment to Enable the Fabrication of 1-D Gridded Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2036-2049 (2018) - 2017
- [c16]Jian Kuang, Evangeline F. Y. Young:
Fixed-Parameter Tractable Algorithms for Optimal Layout Decomposition and Beyond. DAC 2017: 61:1-61:6 - [c15]Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu:
Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design. DAC 2017: 70:1-70:6 - [c14]Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu:
A unified framework for simultaneous layout decomposition and mask optimization. ICCAD 2017: 81-88 - [c13]Wing-Kai Chow, Jian Kuang, Peishan Tu, Evangeline F. Y. Young:
Fence-aware detailed-routability driven placement. SLIP 2017: 1-7 - 2016
- [j3]Jian Kuang, Evangeline F. Y. Young:
Row-structure stencil planning approaches for E-beam lithography with overlapped characters. Integr. 55: 232-245 (2016) - [j2]Chuangwen Liu, Peishan Tu, Pangbo Wu, Haomo Tang, Yande Jiang, Jian Kuang, Evangeline F. Y. Young:
An Effective Chemical Mechanical Polishing Fill Insertion Approach. ACM Trans. Design Autom. Electr. Syst. 21(3): 54:1-54:21 (2016) - [j1]Jian Kuang, Wing-Kai Chow, Evangeline F. Y. Young:
Triple Patterning Lithography Aware Optimization and Detailed Placement Algorithms for Standard Cell-Based Designs. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1319-1332 (2016) - [c12]Jian Kuang, Junjie Ye, Evangeline F. Y. Young:
Simultaneous template optimization and mask assignment for DSA with multiple patterning. ASP-DAC 2016: 75-82 - [c11]Jian Kuang, Evangeline F. Y. Young:
Optimization for Multiple Patterning Lithography with cutting process and beyond. DATE 2016: 43-48 - [c10]Jian Kuang, Evangeline F. Y. Young, Bei Yu:
Incorporating cut redistribution with mask assignment to enable 1D gridded design. ICCAD 2016: 48 - [c9]Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Peishan Tu, Hang Zhang, Evangeline F. Y. Young, Bei Yu:
RippleFPGA: a routability-driven placement for large-scale heterogeneous FPGAs. ICCAD 2016: 67 - 2015
- [c8]Jian Kuang, Wing-Kai Chow, Evangeline F. Y. Young:
A robust approach for process variation aware mask optimization. DATE 2015: 1591-1594 - [c7]Chuangwen Liu, Peishan Tu, Pangbo Wu, Haomo Tang, Yande Jiang, Jian Kuang, Evangeline F. Y. Young:
An Effective Chemical Mechanical Polishing Filling Approach. ISVLSI 2015: 44-49 - 2014
- [c6]Jian Kuang, Wing-Kai Chow, Evangeline F. Y. Young:
Triple patterning lithography aware optimization for standard cell based design. ICCAD 2014: 108-115 - [c5]Jian Kuang, Evangeline F. Y. Young:
Overlapping-aware throughput-driven stencil planning for E-beam lithography. ICCAD 2014: 254-261 - [c4]Wing-Kai Chow, Jian Kuang, Xu He, Wenzan Cai, Evangeline F. Y. Young:
Cell density-driven detailed placement with displacement constraint. ISPD 2014: 3-10 - [c3]Jian Kuang, Evangeline F. Y. Young:
A highly-efficient row-structure stencil planning approach for e-beam lithography with overlapped characters. ISPD 2014: 109-116 - 2013
- [c2]Jian Kuang, Evangeline F. Y. Young:
An efficient layout decomposition approach for triple patterning lithography. DAC 2013: 69:1-69:6 - [c1]Xu He, Tao Huang, Wing-Kai Chow, Jian Kuang, Ka-Chun Lam, Wenzan Cai, Evangeline F. Y. Young:
Ripple 2.0: high quality routability-driven placement via global router integration. DAC 2013: 152:1-152:6
Coauthor Index
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