default search action
Timothy M. Jones 0001
Person information
- affiliation: University of Cambridge, UK
Other persons with the same name
- Timothy M. Jones 0002 — Bellevue College, WA, USA
- Timothy M. Jones 0003 — Lilly Research Laboratories, Indianapolis, IN, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j19]Ajeya Naithani
, Jaime Roelandts
Decoupled Vector Runahead for Prefetching Nested Memory-Access Chains. IEEE Micro 44(4): 20-26 (2024) - [c56]Yuxin Guo, Alexandra W. Chadwick
OptiWISE: Combining Sampling and Instrumentation for Granular CPI Analysis. CGO 2024: 373-385 - [c55]Jaime Roelandts, Ajeya Naithani, Sam Ainsworth, Timothy M. Jones, Lieven Eeckhout:
Scalar Vector Runahead. MICRO 2024: 1367-1381 - 2023
- [c54]Lucia Pons, Julio Sahuquillo, Timothy M. Jones:
Dynamic Allocation of Processor Cores to Graph Applications on Commodity Servers. PACT 2023: 323-324 - [c53]Ajeya Naithani
Decoupled Vector Runahead. MICRO 2023: 17-31 - 2022
- [j18]Ajeya Naithani
Vector Runahead for Indirect Memory Accesses. IEEE Micro 42(4): 116-123 (2022) - [c52]Márton Erdos
MineSweeper: a "clean sweep" for drop-in use-after-free prevention. ASPLOS 2022: 212-225 - 2021
- [j17]Hsi-Ming Ho, Ruoyu Zhou, Timothy M. Jones:
Timed hyperproperties. Inf. Comput. 280: 104639 (2021) - [c51]Mahwish Arif, Ruoyu Zhou, Hsi-Ming Ho, Timothy M. Jones:
Cinnamon: A Domain-Specific Language for Binary Profiling and Monitoring. CGO 2021: 103-114 - [c50]Sam Ainsworth, Lionel Zoubritzky, Alan Mycroft, Timothy M. Jones:
ParaDox: Eliminating Voltage Margins via Heterogeneous Fault Tolerance. HPCA 2021: 520-532 - [c49]Xiaochun Zhang, Timothy M. Jones, Simone Campanoni:
Quantifying the Semantic Gap Between Serial and Parallel Programming. IISWC 2021: 151-162 - [c48]Ajeya Naithani
Vector Runahead. ISCA 2021: 195-208 - [c47]Peng Sun, Giacomo Gabrielli
Speculative Vectorisation with Selective Replay. ISCA 2021: 223-236 - [c46]Sam Ainsworth
Compendia: reducing virtual-memory costs via selective densification. ISMM 2021: 52-65 - 2020
- [j16]Nándor Licker, Timothy M. Jones:
Duplo: a framework for OCaml post-link optimisation. Proc. ACM Program. Lang. 4(ICFP): 98:1-98:29 (2020) - [j15]Ioan Hadade
Software Prefetching for Unstructured Mesh Applications. ACM Trans. Parallel Comput. 7(1): 3:1-3:23 (2020) - [c45]Sam Ainsworth
The Guardian Council: Parallel Programmable Hardware Security. ASPLOS 2020: 1277-1293 - [c44]Joe Savage, Timothy M. Jones:
HALO: post-link heap-layout optimisation. CGO 2020: 94-106 - [c43]Sam Ainsworth, Timothy M. Jones:
MuonTrap: Preventing Cross-Domain Spectre-Like Attacks by Capturing Speculative State. ISCA 2020: 132-144 - [c42]Sam Ainsworth
Prefetching in functional languages. ISMM 2020: 16-29 - [c41]Sam Ainsworth
MarkUs: Drop-in use-after-free prevention for low-level languages. SP 2020: 578-591 - [c40]Nathaniel Wesley Filardo
Cornucopia: Temporal Safety for CHERI Heaps. SP 2020: 608-625 - [i3]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2019
- [c39]Ruoyu Zhou, Timothy M. Jones
Janus: Statically-Driven and Profile-Guided Automatic Dynamic Binary Parallelisation. CGO 2019: 15-25 - [c38]Sam Ainsworth
ParaMedic: Heterogeneous Parallel Error Correction. DSN 2019: 201-213 - [c37]Hongyan Xia, Jonathan Woodruff
CHERIvoke: Characterising Pointer Revocation using CHERI Capabilities for Temporal Memory Safety. MICRO 2019: 545-557 - [c36]Hsi-Ming Ho
On Verifying Timed Hyperproperties. TIME 2019: 20:1-20:18 - [c35]Ruoyu Zhou, George Wort, Márton Erdos, Timothy M. Jones
The janus triad: exploiting parallelism through dynamic binary modification. VEE 2019: 88-100 - [i2]Sam Ainsworth, Timothy M. Jones:
MuonTrap: Preventing Cross-Domain Spectre-Like Attacks by Capturing Speculative State. CoRR abs/1911.08384 (2019) - 2018
- [j14]Sam Ainsworth
Software Prefetching for Indirect Memory Accesses: A Microarchitectural Perspective. ACM Trans. Comput. Syst. 36(3): 8:1-8:34 (2018) - [c34]Sam Ainsworth
An Event-Triggered Programmable Prefetcher for Irregular Workloads. ASPLOS 2018: 578-592 - [c33]Sam Ainsworth
Parallel Error Detection Using Heterogeneous Cores. DSN 2018: 338-349 - [c32]Ioan Hadade
Software Prefetching for Unstructured Mesh Applications. IA3@SC 2018: 11-19 - [i1]Hsi-Ming Ho, Ruoyu Zhou, Timothy M. Jones:
On Verifying Timed Hyperproperties. CoRR abs/1812.10005 (2018) - 2017
- [j13]Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones
Automatically accelerating non-numerical programs by architecture-compiler co-design. Commun. ACM 60(12): 88-97 (2017) - [j12]Alejandro Valero
On Microarchitectural Mechanisms for Cache Wearout Reduction. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 857-871 (2017) - [c31]Sam Ainsworth, Timothy M. Jones:
Software prefetching for indirect memory accesses. CGO 2017: 305-317 - [c30]Jyothish Soman, Timothy M. Jones
High performance fault tolerance through predictive instruction re-execution. DFT 2017: 1-4 - 2016
- [j11]Alejandro Valero
Enhancing the L1 Data Cache Design to Mitigate HCI. IEEE Comput. Archit. Lett. 15(2): 93-96 (2016) - [c29]Konstantina Mitropoulou, Vasileios Porpodas, Timothy M. Jones
COMET: communication-optimised multi-threaded error-detection technique. CASES 2016: 7:1-7:10 - [c28]Niall Murphy, Timothy M. Jones
Performance implications of transient loop-carried data dependences in automatically parallelized loops. CC 2016: 23-33 - [c27]Muhammad Ridwan Madarbux, Anouk Van Laer, Philip M. Watts, Timothy M. Jones
Energy Efficient And Low Latency Interconnection Network For Multicast Invalidates In Shared Memory Systems. AISTECS@HiPEAC 2016: 1:1-1:6 - [c26]Konstantina Mitropoulou, Vasileios Porpodas, Xiaochun Zhang, Timothy M. Jones
Lynx: Using OS and Hardware Support for Fast Fine-Grained Inter-Core Communication. ICS 2016: 18:1-18:12 - [c25]Sam Ainsworth
Graph Prefetching Using Data Structure Knowledge. ICS 2016: 39:1-39:11 - 2015
- [c24]Vasileios Porpodas, Timothy M. Jones
Throttling Automatic Vectorization: When Less is More. PACT 2015: 432-444 - [c23]Vasileios Porpodas, Alberto Magni, Timothy M. Jones
PSLP: padded SLP automatic vectorization. CGO 2015: 190-201 - [c22]Anouk Van Laer, Chamath Ellawala, Muhammad Ridwan Madarbux, Philip M. Watts, Timothy M. Jones:
Coherence based message prediction for optically interconnected chip multiprocessors. DATE 2015: 613-616 - [c21]Jyothish Soman, Negar Miralaei, Alan Mycroft
REPAIR: Hard-error recovery via re-execution. DFTS 2015: 76-79 - 2014
- [j10]Muhammad Ridwan Madarbux, Anouk Van Laer, Philip M. Watts, Timothy M. Jones
Towards zero latency photonic switching in shared memory networks. Concurr. Comput. Pract. Exp. 26(15): 2551-2566 (2014) - [c20]Amitabha Roy, Timothy M. Jones:
ALLARM: Optimizing sparse directories for thread-local data. DATE 2014: 1-6 - [c19]Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones
HELIX-RC: An architecture-compiler co-design for automatic parallelization of irregular programs. ISCA 2014: 217-228 - 2013
- [j9]Karthik T. Sundararajan, Timothy M. Jones
The Smart Cache: An Energy-Efficient Cache Architecture Through Dynamic Adaptation. Int. J. Parallel Program. 41(2): 305-330 (2013) - [j8]Christophe Dubach, Timothy M. Jones
Dynamic microarchitectural adaptation using machine learning. ACM Trans. Archit. Code Optim. 10(4): 31:1-31:28 (2013) - [c18]Karthik T. Sundararajan, Timothy M. Jones
RECAP: Region-Aware Cache Partitioning. ICCD 2013: 294-301 - [c17]Anouk Van Laer, Timothy M. Jones, Philip M. Watts:
Full system simulation of optically interconnected chip multiprocessors using gem5. OFC/NFOEC 2013: 1-3 - 2012
- [j7]Simone Campanoni, Timothy M. Jones
Helix: Making the Extraction of Thread-Level Parallelism Mainstream. IEEE Micro 32(4): 8-18 (2012) - [j6]Javier Lira, Timothy M. Jones
The migration prefetcher: Anticipating data promotion in dynamic NUCA caches. ACM Trans. Archit. Code Optim. 8(4): 45:1-45:20 (2012) - [j5]Christophe Dubach, Timothy M. Jones
Exploring and Predicting the Effects of Microarchitectural Parameters and Compiler Optimizations on Performance and Energy. ACM Trans. Embed. Comput. Syst. 11(S1): 24 (2012) - [c16]Karthik T. Sundararajan, Timothy M. Jones
Energy-efficient cache partitioning for future CMPs. PACT 2012: 465-466 - [c15]Simone Campanoni, Timothy M. Jones
HELIX: automatic parallelization of irregular programs for chip multiprocessing. CGO 2012: 84-93 - [c14]Simone Campanoni, Timothy M. Jones
The HELIX project: overview and directions. DAC 2012: 277-282 - [c13]Karthik T. Sundararajan, Vasileios Porpodas, Timothy M. Jones
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs. HPCA 2012: 311-322 - 2011
- [j4]Christophe Dubach, Timothy M. Jones
An Empirical Architecture-Centric Approach to Microarchitectural Design Space Exploration. IEEE Trans. Computers 60(10): 1445-1458 (2011) - [j3]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella
Compiler Directed Issue Queue Energy Reduction. Trans. High Perform. Embed. Archit. Compil. 4: 42-62 (2011) - [c12]Javier Lira, Timothy M. Jones
Beforehand Migration on D-NUCA Caches. PACT 2011: 197-198 - [c11]Karthik T. Sundararajan, Timothy M. Jones
A reconfigurable cache architecture for energy efficiency. Conf. Computing Frontiers 2011: 9 - [c10]Timothy M. Jones
Link-time optimization for power efficiency in a tagless instruction cache. CGO 2011: 32-41 - [c9]Karthik T. Sundararajan, Timothy M. Jones
Smart cache: A self adaptive cache architecture for energy efficiency. ICSAMOS 2011: 41-50 - 2010
- [c8]Christophe Dubach, Timothy M. Jones
A Predictive Model for Dynamic Microarchitectural Adaptivity Control. MICRO 2010: 485-496
2000 – 2009
- 2009
- [j2]Timothy M. Jones
Exploring the limits of early register release: Exploiting compiler analysis. ACM Trans. Archit. Code Optim. 6(3): 12:1-12:30 (2009) - [j1]Timothy M. Jones
Energy-efficient register caching with compiler assistance. ACM Trans. Archit. Code Optim. 6(4): 13:1-13:23 (2009) - [c7]Christophe Dubach, Timothy M. Jones
Rapid early-stage microarchitecture design using predictive models. ICCD 2009: 297-304 - [c6]Christophe Dubach, Timothy M. Jones
Portable compiler optimisation across embedded programs and microarchitectures using machine learning. MICRO 2009: 78-88 - 2008
- [c5]Christophe Dubach, Timothy M. Jones
Exploring and predicting the architecture/optimising compiler co-design space. CASES 2008: 31-40 - [c4]Timothy M. Jones
Instruction Cache Energy Saving Through Compiler Way-Placement. DATE 2008: 1196-1201 - 2007
- [c3]Christophe Dubach, Timothy M. Jones
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach. MICRO 2007: 262-271 - 2006
- [b1]Timothy M. Jones:
Compiler-directed energy savings in superscalar processors. University of Edinburgh, UK, 2006 - 2005
- [c2]Timothy M. Jones
Compiler Directed Early Register Release. IEEE PACT 2005: 110-122 - [c1]Timothy M. Jones
Software Directed Issue Queue Power Reduction. HPCA 2005: 144-153
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-12-11 21:38 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: