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Chung Lam
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2020 – today
- 2020
- [j3]Xuhui Chen
, Huifang Hu, Xiaoqing Huang, Weiran Cai, Ming Liu, Chung Lam, Xinnan Lin, Lining Zhang, Mansun Chan:
A SPICE Model of Phase Change Memory for Neuromorphic Circuits. IEEE Access 8: 95278-95287 (2020)
2010 – 2019
- 2018
- [c3]Wanki Kim, SangBum Kim
Reliability benefits of a metallic liner in confined PCM. IRPS 2018: 6 - 2017
- [j2]Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew J. BrightSky, SangBum Kim
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications. IEEE J. Solid State Circuits 52(1): 218-228 (2017) - [i4]Jesse H. Engel, Sukru Burc Eryilmaz, SangBum Kim, Matthew BrightSky, Chung Lam, Hsiang-Lan Lung, Bruno A. Olshausen, H.-S. Philip Wong:
Opportunities for Analog Coding in Emerging Memory Systems. CoRR abs/1701.06063 (2017) - 2016
- [c2]Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew BrightSky, SangBum Kim, Hsiang-Lam Lung, Chung Lam:
7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications. ISSCC 2016: 134-135 - [i3]Sukru Burc Eryilmaz, Emre Neftci, Siddharth Joshi, SangBum Kim, Matthew BrightSky, Hsiang-Lan Lung, Chung Lam, Gert Cauwenberghs, H.-S. Philip Wong:
Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses. CoRR abs/1609.08686 (2016) - 2014
- [i2]Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong:
Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices. CoRR abs/1405.7716 (2014) - [i1]Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong:
Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array. CoRR abs/1406.4951 (2014) - 2011
- [j1]Jing Li
Phase change memory. Sci. China Inf. Sci. 54(5): 1061-1072 (2011) - [c1]Cheng-Yuan Wen, Jeyanandh Paramesh, Larry T. Pileggi, Jing Li
Post-silicon calibration of analog CMOS using phase-change memory cells. ESSCIRC 2011: 423-426
Coauthor Index
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