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Bishnu Patra
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2020 – today
- 2024
- [c10]Sushil Subramanian, Todor Mladenov, Simon Schaal, Bishnu Patra, Lester Lampert, Nancy K. Robinson, Jeanette Roberts, Stefano Pellerano:
A Scalable mK Cryo-CMOS Demultiplexer Chip for Voltage Biasing and High-Speed Control of Silicon Qubit Gates. VLSI Technology and Circuits 2024: 1-2 - 2022
- [c9]Stefano Pellerano, Sushil Subramanian, Jong Seok Park, Bishnu Patra, Todor Mladenov, Xiao Xue
, Lieven M. K. Vandersypen, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano:
Cryogenic CMOS for Qubit Control and Readout. CICC 2022: 1-8 - [c8]Jiang Gong, Bishnu Patra, Luc Enthoven, Job van Staveren, Fabio Sebastiano, Masoud Babaie:
A 0.049mm2 7.1-to-16.8GHz Dual-Core Triple-Mode VCO Achieving 200dB FoMA in 22nm FinFET. ISSCC 2022: 1-3 - 2021
- [c7]Bagas Prabowo
A 6-to-8GHz 0.17mW/Qubit Cryo-CMOS Receiver for Multiple Spin Qubit Readout in 40nm CMOS Technology. ISSCC 2021: 212-214 - 2020
- [j3]Jeroen Petrus Gerardus van Dijk
A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons. IEEE J. Solid State Circuits 55(11): 2930-2946 (2020) - [j2]Jeroen P. G. van Dijk
Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control. IEEE Trans. Circuits Syst. 67-I(12): 5380-5393 (2020) - [c6]Bishnu Patra
19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers. ISSCC 2020: 304-306
2010 – 2019
- 2019
- [c5]Mohammadreza Mehrpoo, Bishnu Patra
Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers. ISCAS 2019: 1-5 - 2018
- [j1]Bishnu Patra
Cryo-CMOS Circuits and Systems for Quantum Computing Applications. IEEE J. Solid State Circuits 53(1): 309-321 (2018) - 2017
- [c4]Fabio Sebastiano, Harald Homulle
Cryo-CMOS Electronic Control for Scalable Quantum Computing: Invited. DAC 2017: 13:1-13:6 - [c3]Edoardo Charbon, Fabio Sebastiano
15.5 Cryo-CMOS circuits and systems for scalable quantum computing. ISSCC 2017: 264-265 - [c2]Fabio Sebastiano
Cryogenic CMOS interfaces for quantum devices. IWASI 2017: 59-62 - 2016
- [c1]Harald Homulle
CryoCMOS hardware technology a classical infrastructure for a scalable quantum computer. Conf. Computing Frontiers 2016: 282-287
Coauthor Index
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