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IEEE Design & Test, Volume 34
Volume 34, Number 1, February 2017
- Jörg Henkel:
3D Test. 4-5 - Erik Jan Marinissen
, Yervant Zorian:
Guest Editors' Introduction: Design & Test of a High-Volume 3-D Stacked Graphics Processor With High-Bandwidth Memory. 6-7 - Michael Alfano, Bryan Black, Jeff Rearick, Joseph Siegel, Michael Su, Julius Din:
Unleashing Fury: A New Paradigm for 3-D Design and Test. 8-15 - Hongshin Jun
High-Bandwidth Memory (HBM) Test Challenges and Solutions. 16-25 - Marc Loranger, Onnik Yaglioglu
High-Performance HBM Known-Good-Stack Testing. 26-34 - Panu Jalas
Estimating the Impact of Methodology on Analog Integrated Circuit Design Time. 35-46 - Selahattin Sayil, Archit H. Shah, Md. Adnan Zaman, Mohammad A. Islam
Soft Error Mitigation Using Transmission Gate With Varying Gate and Body Bias. 47-56 - Samah Mohamed Saeed
A Comprehensive Design-for-Test Infrastructure in the Context of Security-Critical Applications. 57-64 - Wisam Kadry, Dmitry Krestyashyn, Arkadiy Morgenshtein
Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms. 65-76 - Andy D. Pimentel
Exploring Exploration: A Tutorial Introduction to Embedded Systems Design Space Exploration. 77-90 - Mark Papermaster:
Developing Great Products for the Immersive Computing Era. 91-94 - Magdy Abadir:
An Interview With Semiconductor Pioneer and EDA Visionary Leader Wally Rhines. 95-105 - Lothar Thiele, Jörg Henkel:
Report of the 2016 Embedded Systems Week (ESWEEK). 106-107 - Theo Theocharides:
Test Technology TC Newsletter. 115-117 - Scott Davidson:
Research Is Its Own Reward. 120
Volume 34, Number 2, April 2017
- Jörg Henkel:
Power Density. 4 - Muhammad Shafique
Guest Editors' Introduction: Computing in the Dark Silicon Era. 5-7 - Muhammad Shafique
Computing in the Dark Silicon Era: Current Trends and Research Challenges. 8-23 - Vivek De
Near Threshold Voltage (NTV) Computing: Computing in the Dark Silicon Era. 24-30 - Nathaniel Ross Pinckney
Impact of FinFET on Near-Threshold Voltage Scalability. 31-38 - Ardavan Pedram, Stephen Richardson, Mark Horowitz, Sameh Galal, Shahar Kvatinsky:
Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era. 39-50 - Mohammad Hashem Haghbayan
Can Dark Silicon Be Exploited to Prolong System Lifetime? 51-59 - Amir Yazdanbakhsh
AxBench: A Multiplatform Benchmark Suite for Approximate Computing. 60-68 - Zhi-Yong Liu
Controller Architecture for Low-Power, Low-Latency DRAM With Built-in Cache. 69-78 - Cristiana Bolchini
A Fully Automated and Configurable Cost-Aware Framework for Adaptive Functional Diagnosis. 79-86 - Marilyn Wolf:
The Physics of Event-Driven IoT Systems. 87-90 - Frank Liu
Highlights of ICCAD 2016. 92-93 - Michael J. Flynn, Subhasish Mitra
Edward J. McCluskey 1929-2016. 94-98 - Theo Theocharides:
TTTC News. 99-101 - Scott Davidson
Dark Silicon, Antiparallelism, and Too Much Work. 104
Volume 34, Number 3, June 2017
- Jörg Henkel:
Emerging Memory Technologies. 4-5 - Yiran Chen, Tei-Wei Kuo
Guest Editors' Introduction: Critical and Enabling Techniques for Emerging Memories. 6-7 - Yiran Chen, Hai Helen Li
Recent Technology Advances of Emerging Memories. 8-22 - Mouhamad Alayan
Correlated Effects on Forming and Retention of Al Doping in HfO2-Based RRAM. 23-30 - Shivam Swami
Reliable Nonvolatile Memories: Techniques and Measures. 31-41 - Caiwen Ding
Multisource Indoor Energy Harvesting for Nonvolatile Processors. 42-49 - Kai-Li Wang
Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package. 50-58 - Hussam Amrouch
Interdependencies of Degradation Effects and Their Impact on Computing. 59-67 - Prabhat Mishra
Post-Silicon Validation in the SoC Era: A Tutorial Introduction. 68-92 - Krishnendu Chakrabarty
Quo Vadis Test? The Past, the Present, and the Future: No Longer a Necessary Evil. 93-95 - David Yeh:
Designing Secure Electronics: Challenges From a Hardware Perspective. 96-102 - Naofumi Takagi
Recap of the 22nd Asia and South- Pacific Design Automation Conference. 103-104 - Scott Davidson
Cyber-Physical System Design With Sensor Networking Technologies. 105-107 - José L. Ayala:
Code Ocean Is Live: Upload Your Algorithms. 108-109 - Theo Theocharides:
Test Technology TC Newsletter. 110-111 - Scott Davidson
Being Connected. 112
Volume 34, Number 4, August 2017
- Jörg Henkel:
Cyber-Physical Systems Security and Privacy. 4 - Michail Maniatakos
Guest Editors' Introduction: Cyber-Physical Systems Security and Privacy. 5-6 - Jairo Giraldo, Esha Sarkar, Alvaro A. Cárdenas, Michail Maniatakos
Security and Privacy in Cyber-Physical Systems: A Survey of Surveys. 7-17 - Sujit Rokka Chhetri
Side Channels of Cyber-Physical Systems: Case Study in Additive Manufacturing. 18-25 - Sandhya Koteshwara
Comparative Study of Authenticated Encryption Targeting Lightweight IoT Applications. 26-33 - A. P. Sakis Meliopoulos, George J. Cokkinides, Rui Fan
Data Attack Detection and Command Authentication via Cyber-Physical Comodeling. 34-43 - Estefanía Etchevés Miciolino
Fault Diagnosis and Network Anomaly Detection in Water Infrastructures. 44-51 - Matthias Jung
A Platform to Analyze DDR3 DRAM's Power and Retention Time. 52-59 - Jishen Zhao, Qiaosha Zou, Yuan Xie:
Overview of 3-D Architecture Design Opportunities and Techniques. 60-68 - Gabe Moretti:
Accellera's Support for ESL Verification and Stimulus Reuse. 69-75 - David Atienza
Report on DATE 2017 in Lausanne. 76-77 - Theo Theocharides:
TTTC News. 78-79 - Scott Davidson
Practice Makes Perfect. 80
Volume 34, Number 5, October 2017
- Jörg Henkel:
Verification and Test. 4 - Magdy S. Abadir, Jayanta Bhadra, Wen Chen, Li-C. Wang:
Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification. 5-6 - Wen Chen
Challenges and Trends in Modern SoC Design Verification. 7-22 - Wen Chen
Data-Driven Test Plan Augmentation for Platform Verification. 23-29 - Syeda Hira Taqdees
Formally Verifying Transfer Functions of Linear Analog Circuits. 30-37 - Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro
Embedded Systems Secure Path Verification at the Hardware/Software Interface. 38-46 - John Adler
Leveraging Software Configuration Management in Automated RTL Design Debug. 47-53 - Maroua Ben Slimane, Imene Ben Hafaiedh
Formal-Based Design and Verification of SoC Arbitration Protocols: A Comparative Analysis of TDMA and Round-Robin. 54-62 - Huanyu Wang, Domenic Forte
Probing Attacks on Integrated Circuits: Challenges and Research Opportunities. 63-71 - Ran Wang
Tackling Test Challenges for Interposer-Based 2.5-D Integrated Circuits. 72-79 - Francky Catthoor
Will Chips of the Future Learn How to Feel Pain and Cure Themselves? 80-87 - Yao-Wen Chang:
An Interview With Professor Chenming Hu, Father of 3D Transistors. 90-96 - Scott Davidson
Engineering Secure Internet of Things Systems. 97-98 - José Luis Ayala:
IEEE Rebooting Computing Week. 99-100 - Theo Theocharides:
Test Technology TC Newsletter. 101-102 - Alvaro A. Cárdenas:
Corrections. 103 - Scott Davidson
To Verification Infinity and Beyond. 104
Volume 34, Number 6, December 2017
- Jörg Henkel:
Self-Aware On-Chip Systems. 4-5 - Axel Jantsch
Guest Editorial: Special Issue on Self-Aware Systems on Chip. 6-7 - Axel Jantsch
Self-Awareness in Systems on Chip - A Survey. 8-26 - Konstantin Shibin
Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure. 27-35 - James J. Davis
KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications. 36-45 - Davide Rossi
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors. 46-53 - Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon
Self-Adaptive Timing Repair. 54-62 - Angelos Antonopoulos
Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective. 63-76 - Katherine Shu-Min Li
Layout-Aware Optimized Prebond Silicon Interposer Test Synthesis. 77-83 - Dongyeob Shin, Jongsun Park
Adaptive ECC for Tailored Protection of Nanoscale Memory. 84-93 - Mohsen Imani
Low-Power Sparse Hyperdimensional Encoder for Language Recognition. 94-101 - Lothar Thiele
Internet of Things - The Quest for Trust. 102-108 - Patrick Mayor, Martin Rajman, Giovanni De Micheli
Nano-Tera.ch: Information Technology for Health, Environment, and Energy. 109-118 - Maria K. Michael, Haralampos-G. D. Stratigopoulos:
Recap of the European Test Symposium 2017 (ETS'17). 119-120 - David Garrett
Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED). 121-122 - José Luis Ayala:
CEDA Currents. 123-124 - Theo Theocharides:
Test Technology TC Newsletter. 125-126 - Scott Davidson
Chips Thinking About Chips. 128
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