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7th MTV 2006: Austin, TX, USA
- Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra:
Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA. IEEE Computer Society 2006, ISBN 978-0-7695-2839-7
Introduction
- Preface.
- Acknowledgement.
- Workshop Organizing Committee.
- Program Committee.
Test
- Paolo Bernardi
, Letícia Maria Veiras Bolzani, Alberto Manzone, Massimo Osella, Massimo Violante, Matteo Sonza Reorda
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. 3-8 - Jorge Campos, Hussain Al-Asaad:
Circuit Profiling Mechanisms for High-Level {ATPG}. 9-14 - Vijay Gangaram, Deepa Bhan, James K. Caldwell:
Functional Test Selection for High Volume Manufacturing. 15-19 - József Sziray:
Test Calculation for Logic and Delay Faults in Digital Circuits. 20-32
Verification and Test Generation
- Heon-Mo Koo, Prabhat Mishra
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. 33-36 - Marc Herbstritt
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. 37-44 - Tamarah Arons, Elad Elster, Terry Murphy, Eli Singerman:
Embedded Software Validation: Applying Formal Techniques for Coverage and Test Generation. 45-51 - Noah Bamford, Rekha Bangalore, Eric Chapman, Hector Chavez, Rajeev Dasari, Yinfang Lin, Edgar Jimenez:
Challenges in System on Chip Verification. 52-60
Architectural and Design Issues
- Hassan Al-Sukhni, David Lindberg, James Holt, Michele Reese:
Workload Slicing for Characterizing New Features in High Performance Microprocessors. 61-67 - Hiren D. Patel, Sandeep K. Shukla:
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. 68-75 - Hyun Sung Kim, D. M. H. Walker:
Statistical Static Timing Analysis Considering the Impact of Power Supply Noise in {VLSI} Circuits. 76-82 - Jianmin Zhang, Ming Yan, Sikun Li:
Debug Support for Scalable System-on-Chip. 83-87 - Sean Safarpour, Andreas G. Veneris:
Abstraction and Refinement Techniques in Automated Design Debugging. 88-93 - Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu:
Diagnosing Silicon Failures Based on Functional Test Patterns. 94-98
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