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Mario Konijnenburg
M. H. Konijnenburg
Person information
- affiliation: IMEC, Eindhoven, The Netherlands
- affiliation: Delft University of Technology, The Netherlands
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2020 – today
- 2024
- [j20]Anoop Narayan Bhat, Paul Mateman, Zule Xu, Peter Vis, Paul Detterer, Gururaja Kasanadi Ramachandra, Yunus Baykal, Mario Konijnenburg, Yao-Hong Liu, Christian Bachmann, Peng Zhang:
A 7.6-mW IR-UWB Receiver Achieving -17-dBm Blocker Resilience With a Linear RF Front-End. IEEE J. Solid State Circuits 59(12): 3993-4008 (2024) - [j19]Yuming He
, Stan van der Ven
An Event-Based Neural Compressive Telemetry With >11× Loss-Less Data Reduction for High-Bandwidth Intracortical Brain Computer Interfaces. IEEE Trans. Biomed. Circuits Syst. 18(5): 1100-1111 (2024) - [j18]Leandro Mateus Giacomini Rocha
Multidie 3-D Stacking of Memory Dominated Neuromorphic Architectures. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 2144-2148 (2024) - [c44]Haoming Xin, Meiyi Zhou
A 10V Compliant 16-Channel Stimulator ASIC with sub-10nA Mismatch and Simultaneous ETI Sensing for Selective Vagus Nerve Stimulation. CICC 2024: 1-2 - [c43]Anoop Narayan Bhat, Paul Mateman, Zule Xu, Peter Vis, Paul Detterer, Gururaja Kasanadi Ramachandra, Yunus Baykal, Mario Konijnenburg, Yao-Hong Liu, Christian Bachmann, Peng Zhang:
23.5 A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-End. ISSCC 2024: 408-410 - [i3]Alexandra F. Dobrita, Amirreza Yousefzadeh, Simon Thorpe, Kanishkan Vadivel, Paul Detterer, Guangzhi Tang, Gert-Jan van Schaik, Mario Konijnenburg, Anteneh Gebregiorgis, Said Hamdioui, Manolis Sifalakis:
EON-1: A Brain-Inspired Processor for Near-Sensor Extreme Edge Online Feature Extraction. CoRR abs/2406.17285 (2024) - 2023
- [j17]Manolis Katsaragakis, Lazaros Papadopoulos, Mario Konijnenburg, Francky Catthoor, Dimitrios Soudris
A memory footprint optimization framework for Python applications targeting edge devices. J. Syst. Archit. 142: 102936 (2023) - [j16]Benoît Walter Denkinger
Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems. IEEE Trans. Computers 72(9): 2548-2560 (2023) - [c42]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. ISCAS 2023: 1-5 - [i2]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis, Gert-Jan van Schaik, Amirreza Yousefzadeh:
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. CoRR abs/2303.15224 (2023) - 2022
- [c41]Amirreza Yousefzadeh, Gert-Jan van Schaik, Mohammad Tahghighi, Paul Detterer, Stefano Traferro, Martijn Hijdra, Jan Stuijt, Federico Corradi
SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture. AICAS 2022: 371-374 - [c40]Benoît W. Denkinger
VWR2A: a very-wide-register reconfigurable-array architecture for low-power embedded devices. DAC 2022: 895-900 - [c39]Minyoung Song
A 1.66Gb/s and 5.8pJ/b Transcutaneous IR-UWB Telemetry System with Hybrid Impulse Modulation for Intracortical Brain-Computer Interfaces. ISSCC 2022: 394-396 - [i1]Benoît Walter Denkinger, Miguel Peón Quirós, Mario Konijnenburg, David Atienza, Francky Catthoor:
VWR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices. CoRR abs/2204.05009 (2022) - 2021
- [j15]Qiuyang Lin
A 134 DB Dynamic Range Noise Shaping Slope Light-to-Digital Converter for Wearable Chest PPG Applications. IEEE Trans. Biomed. Circuits Syst. 15(6): 1224-1235 (2021) - [c38]Qiuyang Lin, Shuang Song
A 28μW 134dB DR 2nd-Order Noise-Shaping Slope Light-to-Digital Converter for Chest PPG Monitoring. ISSCC 2021: 390-392 - 2020
- [j14]Leandro Mateus Giacomini Rocha
Binary CorNET: Accelerator for HR Estimation From Wrist-PPG. IEEE Trans. Biomed. Circuits Syst. 14(4): 715-726 (2020) - [j13]Qiuyang Lin
A 119dB Dynamic Range Charge Counting Light-to-Digital Converter For Wearable PPG/NIRS Monitoring Applications. IEEE Trans. Biomed. Circuits Syst. 14(4): 800-810 (2020) - [c37]Manolis Katsaragakis, Lazaros Papadopoulos, Mario Konijnenburg, Francky Catthoor, Dimitrios Soudris:
Memory Footprint Optimization Techniques for Machine Learning Applications in Embedded Systems. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j12]Hyunsoo Ha
A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for Two-Electrode Measurement. IEEE J. Solid State Circuits 54(11): 2969-2979 (2019) - [j11]Dwaipayan Biswas
CorNET: Deep Learning Framework for PPG-Based Heart Rate Estimation and Biometric Identification in Ambulant Environment. IEEE Trans. Biomed. Circuits Syst. 13(2): 282-291 (2019) - [j10]Shuang Song
A 769 μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Monitoring Health Patches. IEEE Trans. Biomed. Circuits Syst. 13(6): 1506-1517 (2019) - [c36]Leandro Mateus Giacomini Rocha
Real-time HR Estimation from wrist PPG using Binary LSTMs. BioCAS 2019: 1-4 - [c35]Luke R. Everson, Dwaipayan Biswas
BioTranslator: Inferring R-Peaks from Ambulatory Wrist-Worn PPG Signal. EMBC 2019: 4241-4245 - [c34]Roland Van Wegberg, Julien Penders, Chris Van Hoof
A 5-Channel Unipolar Fetal-ECG Readout IC for Patch-Based Fetal Monitoring. ESSCIRC 2019: 71-74 - [c33]Mario Konijnenburg, Roland Van Wegberg, Shuang Song
A 769μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Health Patches. ISSCC 2019: 360-362 - [c32]Hyunsoo Ha, Wim Sijbers, Roland Van Wegberg, Jiawei Xu, Mario Konijnenburg, Peter Vis, Arjan Breeschoten, Shuang Song
A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for 2-Electrode Measurement. ISSCC 2019: 368-370 - [c31]Qiuyang Lin, Jiawei Xu, Shuang Song
A 196μW, Reconfigurable Light-to-Digital Converter with 119dB Dynamic Range, for Wearable PPG/NIRS Sensors. VLSI Circuits 2019: 58- - 2018
- [j9]Jiawei Xu
A 36 μW 1.1 mm2 Reconfigurable Analog Front-End for Cardiovascular and Respiratory Signals Recording. IEEE Trans. Biomed. Circuits Syst. 12(4): 774-783 (2018) - [j8]Jiawei Xu
A 665 μW Silicon Photomultiplier-Based NIRS/EEG/EIT Monitoring ASIC for Wearable Functional Brain Imaging. IEEE Trans. Biomed. Circuits Syst. 12(6): 1267-1277 (2018) - [c30]Luke R. Everson, Dwaipayan Biswas
BiometricNet: Deep Learning based Biometric Identification using Wrist-Worn PPG. ISCAS 2018: 1-5 - [c29]Jiawei Xu, Mario Konijnenburg, Budi Lukita, Shuang Song
A 665μW silicon photomultiplier-based NIRS/EEG/EIT monitoring asic for wearable functional brain imaging. ISSCC 2018: 294-296 - 2016
- [j7]Mario Konijnenburg
A Multi(bio)sensor Acquisition System With Integrated Processor, Power Management, 8×8 LED Drivers, and Simultaneously Synchronized ECG, BIO-Z, GSR, and Two PPG Readouts. IEEE J. Solid State Circuits 51(11): 2584-2595 (2016) - [c28]Erik Jan Marinissen
IoT: Source of test challenges. ETS 2016: 1-10 - [c27]Mario Konijnenburg, Stefano Stanzione, Long Yan, Dong-Woo Jee, Julia Pettine, Roland Van Wegberg, Hyejung Kim, Chris van Liempd, Ram Fish, James Schuessler, Harmke de Groot, Chris Van Hoof
28.4 A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG. ISSCC 2016: 480-481 - 2015
- [j6]Nick Van Helleputte
A 345 µW Multi-Sensor Biomedical SoC With Bio-Impedance, 3-Channel ECG, Motion Artifact Reduction, and Integrated DSP. IEEE J. Solid State Circuits 50(1): 230-244 (2015) - 2014
- [j5]Hyejung Kim, Sunyoung Kim, Nick Van Helleputte
A Configurable and Low-Power Mixed Signal SoC for Portable ECG Monitoring Applications. IEEE Trans. Biomed. Circuits Syst. 8(2): 257-267 (2014) - [j4]Changmoo Kim, Moo-Kyoung Chung, Yeon-Gon Cho, Mario Konijnenburg, Soojung Ryu, Jeongwook Kim:
ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications. ACM Trans. Reconfigurable Technol. Syst. 7(3): 22:1-22:15 (2014) - [c26]Christian Bachmann
10.6 A 0.74V 200μW multi-standard transceiver digital baseband in 40nm LP-CMOS for 2.4GHz Bluetooth Smart / ZigBee / IEEE 802.15.6 personal area networks. ISSCC 2014: 186-187 - [c25]Nick Van Helleputte
18.3 A multi-parameter signal-acquisition SoC for connected personal health applications. ISSCC 2014: 314-315 - 2013
- [c24]Tobias Gemmeke
In-situ performance monitor employing threshold based notifications (TheBaN). ESSCIRC 2013: 271-274 - [c23]Benjamin Busze, Alex Young, Christian Bachmann
An energy-aware and scalable UWB Impulse Radio baseband supporting coherent reception. GLOBECOM 2013: 3748-3753 - [c22]Mario Konijnenburg, Yeon-Gon Cho, Maryam Ashouei, Tobias Gemmeke, Changmoo Kim, Jos Hulzink, Jan Stuyt, Mookyung Jung, Jos Huisken, Soojung Ryu, Jungwook Kim, Harmke de Groot:
Reliable and energy-efficient 1MHz 0.4V dynamically reconfigurable SoC for ExG applications in 40nm LP CMOS. ISSCC 2013: 430-431 - 2012
- [j3]Erik Jan Marinissen
A DfT Architecture for 3D-SICs Based on a Standardizable Die Wrapper. J. Electron. Test. 28(1): 73-92 (2012) - [c21]Changmoo Kim, Moo-Kyoung Chung, Yeon-Gon Cho, Mario Konijnenburg, Soojung Ryu, Jeongwook Kim:
ULP-SRP: Ultra low power Samsung Reconfigurable Processor for biomedical applications. FPT 2012: 329-334 - [c20]Xiaoyan Wang, Yikun Yu, Benjamin Busze, Hans W. Pflug, Alex Young, Xiongchuan Huang, Cui Zhou, Mario Konijnenburg, Kathleen Philips, Harmke de Groot:
A meter-range UWB transceiver chipset for around-the-head audio streaming. ISSCC 2012: 450-452 - 2011
- [j2]Maja Vidojkovic, Xiongchuan Huang, Pieter Harpe, Simonetta Rampu, Cui Zhou, Li Huang, Jef van de Molengraft, Koji Imamura, Ben Busze, Frank Bouwens, Mario Konijnenburg, Juan Santana, Arjan Breeschoten, Jos Huisken
A 2.4 GHz ULP OOK Single-Chip Transceiver for Healthcare Applications. IEEE Trans. Biomed. Circuits Syst. 5(6): 523-534 (2011) - [j1]Jos Hulzink, Mario Konijnenburg, Maryam Ashouei, Arjan Breeschoten, Torfinn Berset, Jos Huisken, Jan Stuyt, Harmke de Groot, Francisco Barat, Johan David, Johan Van Ginderdeuren:
An Ultra Low Energy Biomedical Signal Processing System Operating at Near-Threshold. IEEE Trans. Biomed. Circuits Syst. 5(6): 546-554 (2011) - [c19]Sergej Deutsch, Vivek Chickermane, Brion L. Keller, Subhasish Mukherjee, Mario Konijnenburg, Erik Jan Marinissen
Automation of 3D-DfT Insertion. Asian Test Symposium 2011: 395-400 - [c18]Georgios N. Selimis
Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodes. ISCAS 2011: 567-570 - [c17]Maryam Ashouei, Jos Hulzink, Mario Konijnenburg, Jun Zhou, Filipa Duarte, Arjan Breeschoten, Jos Huisken, Jan Stuyt, Harmke de Groot, Francisco Barat, Johan David, Johan Van Ginderdeuren:
A voltage-scalable biomedical signal processor running ECG using 13pJ/cycle at 1MHz and 0.4V. ISSCC 2011: 332-334 - [c16]Maja Vidojkovic, Xiongchuan Huang, Pieter Harpe, Simonetta Rampu, Cui Zhou, Li Huang, Koji Imamura, Ben Busze, Frank Bouwens, Mario Konijnenburg, Juan Santana, Arjan Breeschoten, Jos Huisken
A 2.4GHz ULP OOK single-chip transceiver for healthcare applications. ISSCC 2011: 458-460 - 2010
- [c15]Erik Jan Marinissen
3D DfT architecture for pre-bond and post-bond testing. 3DIC 2010: 1-8 - [c14]Erik Jan Marinissen
A structured and scalable test access architecture for TSV-based 3D stacked ICs. VTS 2010: 269-274
2000 – 2009
- 2006
- [c13]Xinyue Fan, Will R. Moore, Camelia Hora, Mario Konijnenburg, Guido Gronthoud:
A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis. VTS 2006: 266-271
1990 – 1999
- 1999
- [c12]M. H. Konijnenburg, Hans van der Linden, Ad J. van de Goor:
Fault (In)Dependent Cost Estimates and Conflict-Directed Backtracking to Guide Sequential Circuit Test Generation. Asian Test Symposium 1999: 185-191 - [c11]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Illegal State Space Identification for Sequential Circuit Test Generation. DATE 1999: 741-746 - [c10]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Testability of the Philips 80C51 micro-controller. ITC 1999: 820-829 - [c9]Mario Konijnenburg, Hans van der Linden, Jeroen Geuzebroek:
Benchmarking DAT with the ITC'99 ATPG Benchmarks. ITC 1999: 1127 - 1998
- [c8]J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor:
Complete Search in Test Generation for Industrial Circuits with Improved Bus-Conflict Detection. Asian Test Symposium 1998: 212- - 1997
- [c7]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Sequential Test Generation with Advanced Illegal State Search. ITC 1997: 733-742 - 1996
- [c6]J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor:
Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors. Asian Test Symposium 1996: 29-33 - [c5]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Accelerated Compact Test Set Generation for Three-State Circuits. ITC 1996: 29-38 - 1995
- [c4]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Compact test sets for industrial circuits. VTS 1995: 358-366 - 1994
- [c3]J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor:
Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O. ITC 1994: 604-613 - [c2]J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor:
Test generation and three-state elements, buses, and bidirectionals. VTS 1994: 114-121 - 1993
- [c1]M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor:
Test Pattern Generation with Restrictors. ITC 1993: 598-605
Coauthor Index
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last updated on 2024-12-17 20:59 CET by the dblp team
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