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Yoichi Yoshida
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2010 – 2019
- 2012
- [j6]Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda:
6 W/25 mm2 Wireless Power Transmission for Non-contact Wafer-Level Testing. IEICE Trans. Electron. 95-C(4): 668-676 (2012) - 2011
- [c7]Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda:
6W/25mm2 inductive power transfer for non-contact wafer-level testing. ISSCC 2011: 230-232 - [c6]Noriyuki Miura, Yasuhiro Take, Mitsuko Saito, Yoichi Yoshida, Tadahiro Kuroda:
A 2.7Gb/s/mm2 0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking. ISSCC 2011: 490-492 - 2010
- [j5]Yuxiang Yuan, Yoichi Yoshida, Tadahiro Kuroda:
Analysis of Inductive Coupling and Design of Rectifier Circuit for Inter-Chip Wireless Power Link. IEICE Trans. Electron. 93-C(2): 164-171 (2010) - [j4]Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda:
2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE J. Solid State Circuits 45(1): 134-141 (2010) - [j3]Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Masayuki Mizuno, Tadahiro Kuroda:
An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing. IEEE J. Solid State Circuits 45(10): 2057-2065 (2010) - [j2]Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda:
47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2269-2278 (2010) - [c5]Tsutomu Takeya, Kazuhisa Sunaga, Koichi Yamaguchi, Hideyuki Sugita, Yoichi Yoshida, Masayuki Mizuno, Tadahiro Kuroda:
A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications. CICC 2010: 1-4
2000 – 2009
- 2009
- [c4]Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda:
47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking. CICC 2009: 449-452 - [c3]Shotaro Saito, Yoshinori Kohama, Yasufumi Sugimori, Yohei Hasegawa, Hiroki Matsutani, Toru Sano, Kazutaka Kasuga, Yoichi Yoshida, Kiichi Niitsu
, Noriyuki Miura, Tadahiro Kuroda, Hideharu Amano:
MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. FPL 2009: 6-11 - [c2]Yasufumi Sugimori, Yoshinori Kohama, Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda:
A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking. ISSCC 2009: 244-245 - [c1]Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Tadahiro Kuroda, Masayuki Mizuno:
Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing. ISSCC 2009: 470-471 - 2008
- [j1]Yoichi Yoshida, Noriyuki Miura, Tadahiro Kuroda:
A 2 Gb/s Bi-Directional Inter-Chip Data Transceiver With Differential Inductors for High Density Inductive Channel Array. IEEE J. Solid State Circuits 43(11): 2363-2369 (2008)
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