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Noboru Ishihara
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2020 – today
- 2024
- [j19]Zixuan Li, Sang-yeop Lee, Noboru Ishihara, Hiroyuki Ito:
RC-Oscillator-Based Battery-Less Wireless Sensing System Using RF Resonant Electromagnetic Coupling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(5): 727-740 (2024) - 2021
- [c24]Ryo Onishi, Koki Miyamoto, Korkut Kaan Tokgoz
, Noboru Ishihara, Hiroyuki Ito:
Capacitive Sensor Circuit with Relative Slope-Boost Method Based on a Relaxation Oscillator. ASP-DAC 2021: 5-6 - [c23]Kohei Shibata, Akihiro Uchiyama, Akira Onishi, Shinichi Iida, Toshifumi Konishi, Noboru Ishihara, Katsuyuki Machida, Kazuya Masu, Hiroyuki Ito:
A Simplified Analytical Damping Constant Model for Perforated Proof Mass Structure of MEMS Capacitive Accelerometer by Multi-Layer Metal Technology. IEEE SENSORS 2021: 1-4
2010 – 2019
- 2019
- [c22]Tatsuya Koga, Katsuyuki Machida, Yoshihiro Miyake, Kazuya Masu, Takashi Ichikawa, Naoto Tanaka, Taiki Ogata, Hiroki Ora, Daisuke Yamane, Noboru Ishihara, Hiroyuki Ito, Masato Sone
High-Sensitivity Inertial Sensor Module to Measure Hidden Micro Muscular Sounds. BioCAS 2019: 1-4 - 2018
- [j18]Motohiro Takayasu, Shiro Dosho, Hiroyuki Ito, Daisuke Yamane
A 0.18-µm CMOS time-domain capacitive-sensor interface for sub-1mG MEMS accelerometers. IEICE Electron. Express 15(2): 20171227 (2018) - 2017
- [j17]Sho Ikeda
A - 244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique. IEEE J. Solid State Circuits 52(4): 1123-1133 (2017) - [c21]Yosuke Ishikawa, Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique. ASP-DAC 2017: 43-44 - [c20]Yuta Oshima, Iwao Mizumoto, Hiroshi Oguma, Noboru Ishihara, Kazuya Masu:
Estimation of energy self-sufficiency rate by EMS simulation using SPICE. ICTC 2017: 72-75 - 2016
- [c19]Yuta Oshima, Hiroshi Oguma, Noboru Ishihara, Kazuya Masu:
Simulation and evaluation of PV power generation for energy management system using SPICE. ICTC 2016: 74-77 - [c18]Kohei Ohba, Yoshihiro Yoneda, Koji Kurihara, Takashi Suganuma, Hiroyuki Ito, Noboru Ishihara, Kunihiko Gotoh, Koichiro Yamashita, Kazuya Masu:
Environmental Data Recovery using Polynomial Regression for Large-scale Wireless Sensor Networks. SENSORNETS 2016: 161-168 - [c17]Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique. VLSI Circuits 2016: 1-2 - 2015
- [j16]Atsushi Shirane
RF-Powered Transceiver With an Energy- and Spectral-Efficient IF-Based Quadrature Backscattering Transmitter. IEEE J. Solid State Circuits 50(12): 2975-2987 (2015) - [c16]Sho Ikeda, Sang-yeop Lee, Shin Yonezawa, Yiming Fang, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network. ASP-DAC 2015: 40-41 - [c15]Yosuke Ishikawa, Sang-yeop Lee, Shin Yonezawa, Sho Ikeda, Yiming Fang, Taisuke Hamada, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna. ISCAS 2015: 1218-1221 - [c14]Atsushi Shirane
13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique. ISSCC 2015: 1-3 - 2014
- [j15]Sho Ikeda, Sang-yeop Lee, Tatsuya Kamimura, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu
A Sub-1mW Class-C-VCO-Based Low Voltage PLL with Ultra-Low-Power Digitally-Calibrated ILFD in 65nm CMOS. IEICE Trans. Electron. 97-C(6): 495-504 (2014) - [c13]Taisuke Hamada, Hao Jiang, Yiming Fang, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS. APCCAS 2014: 340-343 - [c12]Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. ASP-DAC 2014: 23-24 - [c11]Hiroyuki Ito, Yoshihiro Yoneda, Taiki Ibe, Taisuke Hamada, Noboru Ishihara, Kazuya Masu, Shoichi Masui, Youichi Momiyama:
An ultra-low-power RF transceiver with a 1.5-pJ/bit maximally-digital impulse-transmitter and an 89.5-μW super-regenerative RSSI. A-SSCC 2014: 265-268 - [c10]Sho Ikeda, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.52-V 5.7-GHz low noise sub-sampling PLL with dynamic threshold MOSFET. A-SSCC 2014: 365-368 - [c9]Yusuke Shiino, Hiroyuki Ito, Taku Fujiwara, Noboru Ishihara, Hisashi Yamanouchi, Hiroki Tanabe, Satoshi Nomura, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu:
An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter. ISCAS 2014: 882-885 - 2013
- [j14]Hamid Kiumarsi, Hiroyuki Ito, Kenichi Okada
A 60GHz 3-dB tandem coupler using offset broadside-coupled lines on a silicon substrate. IEICE Electron. Express 10(2): 20120901 (2013) - [c8]Kazuya Masu, Noboru Ishihara, Toshifumi Konishi, Katsuyuki Machida, Hiroshi Toshiyoshi:
Challenges in integration of diverse functionalities on CMOS. ASP-DAC 2013: 390-393 - [c7]Atsushi Shirane, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A process-scalable RF transmitter using 90nm and 65nm Si CMOS. VLSI-DAT 2013: 1-4 - 2012
- [j13]Kazuo Nakano, Shuhei Amakawa
RF signal generator using time domain harmonic suppression technique in 90nm CMOS. IEICE Electron. Express 9(4): 270-275 (2012) - [j12]Sang-yeop Lee, Hiroyuki Ito, Satoru Tanoi, Noboru Ishihara, Kazuya Masu:
Injection-locked fractional frequency multiplier with automatic reference pulse-selection technique. IEICE Electron. Express 9(21): 1624-1629 (2012) - [j11]Sang-yeop Lee, Norifumi Kanemaru, Sho Ikeda, Tatsuya Kamimura, Satoru Tanoi, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65 nm CMOS. IEICE Trans. Electron. 95-C(10): 1589-1597 (2012) - [c6]Sho Ikeda, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
Optimal design method for chip-area-efficient CMOS low-dropout regulator. APCCAS 2012: 332-335 - 2011
- [j10]Noboru Ishihara, Shuhei Amakawa
RF CMOS Integrated Circuit: History, Current Status and Future Prospects. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 556-567 (2011) - [c5]Atsushi Shirane, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 21 V output charge pump circuit with appropriate well-bias supply technique in 0.18 μm Si CMOS. ISOCC 2011: 28-31 - [c4]Norifumi Kanemaru, Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Satoru Tanoi, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A ring-VCO-based injection-locked frequency multiplier using a new pulse generation technique in 65 nm CMOS. ISOCC 2011: 32-35 - 2010
- [j9]Mousa M. Othman, Shuhei Amakawa
Wide-band, high linear low noise amplifier design in 0.18um CMOS technology. IEICE Electron. Express 7(11): 759-764 (2010)
2000 – 2009
- 2009
- [j8]Kazuya Masu
Physical design challenges to nano-CMOS circuits. IEICE Electron. Express 6(11): 703-720 (2009) - [c3]Tomoaki Maekawa, Shuhei Amakawa
Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique. ECCTD 2009: 511-514 - [c2]Yuka Kobayashi, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu:
A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOS. ESSCIRC 2009: 440-443 - 2008
- [c1]Tomoaki Kawamura, Yusuke Ohtomo, Kazuyoshi Nishimura, Noboru Ishihara:
A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion. ISSCC 2008: 456-457 - 2007
- [j7]Noboru Ishihara:
Vdd Gate Biasing RF CMOS Amplifier Design Technique Based on the Effect of Carrier Velocity Saturation. IEICE Trans. Electron. 90-C(9): 1702-1707 (2007)
1990 – 1999
- 1999
- [j6]Keiji Kishine, Noboru Ishihara, Ken-ichi Takiguchi, Haruhiko Ichino:
A 2.5-Gb/s clock and data recovery IC with tunable jitter characteristics for use in LANs and WANs. IEEE J. Solid State Circuits 34(6): 805-812 (1999) - 1998
- [j5]Makoto Nakamura, Noboru Ishihara, Yukio Akazawa:
A 156-Mb/s CMOS optical receiver for burst-mode transmission. IEEE J. Solid State Circuits 33(8): 1179-1187 (1998) - 1995
- [j4]Noboru Ishihara, Shuichi Fujita, Minoru Togashi, Shigeki Hino, Yoshimitsu Arai, Nobuyuki Tanaka, Yoshiji Kobayashi, Yukio Akazawa:
3.5-Gb/s⨉4-ch Si bipolar LSI's for optical interconnections. IEEE J. Solid State Circuits 30(12): 1493-1501 (1995) - 1994
- [j3]Noboru Ishihara, Yukio Akazawa:
A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold technique. IEEE J. Solid State Circuits 29(12): 1566-1571 (1994)
1980 – 1989
- 1989
- [j2]Noboru Ishihara, Hiroyuki Kikuchi, Mamoru Ohara:
Gigahertz-band high-gain GaAs monolithic amplifiers using parallel feedback technique. IEEE J. Solid State Circuits 24(4): 962-968 (1989) - [j1]Haruhiko Ichino, Noboru Ishihara, Masao Suzuki, Shinsuke Konaka:
18-GHz 1/8 dynamic frequency divider using Si bipolar technologies. IEEE J. Solid State Circuits 24(6): 1723-1728 (1989)
Coauthor Index
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