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Yong-Min Ju
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2010 – 2019
- 2018
- [c7]Se-un Shin, Minseong Choi, Seok-Tae Koh, Yu-Jin Yang, Seungchul Jung, Young-Hoon Sohn, Se-Hong Park
, Yong-Min Ju, Youngsin Jo, Yeunhee Huh, Sung-Won Choi, Sang Joon Kim, Gyu-Hyeong Cho:
A 13.56MHz time-interleaved resonant-voltage-mode wireless-power receiver with isolated resonator and quasi-resonant boost converter for implantable systems. ISSCC 2018: 154-156 - [c6]Se-Un Shin, Yeunhee Huh, Yong-Min Ju, Sung-Won Choi, Changsik Shin, Young-Jin Woo, Minseong Choi, Se-Hong Park
A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple. ISSCC 2018: 430-432 - [c5]Sung-Won Choi, Yeunhee Huh, Sang-Hui Park, Kye-Seok Yoon, Jun-Suk Bang, Se-Un Shin, Yong-Min Ju, Yu-Jin Yang, Junghyuk Yoon, Changyong Ahn, Taekseung Kim, Sung-Wan Hong, Gyu-Hyeong Cho:
A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems. VLSI Circuits 2018: 107-108 - [c4]Yeunhee Huh, Se-Un Shin, Sung-Wan Hong, Young-Jin Woo, Yong-Min Ju, Sung-Won Choi, Gyu-Hyeong Cho:
A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a $250\text{m}$ μ Large-DCR Inductor. VLSI Circuits 2018: 225-226 - 2017
- [c3]Ji-Hun Lee
5.2 An 8Ω 10W 91%-power-efficiency 0.0023%-THD+N multi-level Class-D audio amplifier with folded PWM. ISSCC 2017: 88-89 - [c2]Yong-Min Ju, Se-un Shin, Yeunhee Huh, Sang-Hui Park, Jun-Suk Bang, Kiduk Kim, Sung-Won Choi, Ji-Hun Lee
10.4 A hybrid inductor-based flying-capacitor-assisted step-up/step-down DC-DC converter with 96.56% efficiency. ISSCC 2017: 184-185 - 2016
- [c1]Se-un Shin, Min-Yong Jung, Kiduk Kim, Sang-Hui Park, Yeunhee Huh, Changsik Shin, Se-Hong Park
A reconfigurable SIMO system with 10-output dual-bus DC-DC converter using the load balancing function in group allocator for diversified load condition. VLSI Circuits 2016: 1-2
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