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Bon Woong Ku
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2020 – today
- 2022
- [j4]Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim:
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 22:1-22:37 (2022) - [j3]Bon Woong Ku, Catherine D. Schuman
, Md Musabbir Adnan, Tiffany M. Mintz, Raphael C. Pooser, Kathleen E. Hamilton, Garrett S. Rose
Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System. ACM J. Emerg. Technol. Comput. Syst. 18(2): 38:1-38:20 (2022) - 2021
- [j2]Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
Pseudo-3D Physical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements. ACM Trans. Design Autom. Electr. Syst. 26(5): 37:1-37:25 (2021) - [c16]Sai Surya Kiran Pentapati, Bon Woong Ku, Sung Kyu Lim
ML-Based Wire RC Prediction in Monolithic 3D ICs with an Application to Full-Chip Optimization. ISPD 2021: 75-82 - 2020
- [j1]Bon Woong Ku
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1151-1164 (2020) - [c15]Bon Woong Ku, Sung Kyu Lim
Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs. ISLPED 2020: 85-90 - [c14]Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs. ISPD 2020: 47-54
2010 – 2019
- 2019
- [b1]Bon Woong Ku:
Physical design solutions for 3D ICs and their neuromorphic applications. Georgia Institute of Technology, Atlanta, GA, USA, 2019 - [c13]Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. DAC 2019: 101 - [c12]Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ETS 2019: 1-6 - 2018
- [c11]Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim
Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor. DAC 2018: 165:1-165:6 - [c10]Bon Woong Ku, Yu Liu, Yingyezhe Jin, Peng Li, Sung Kyu Lim
Area-efficient and low-power face-to-face-bonded 3D liquid state machine design. ICCAD 2018: 121 - [c9]Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim
Compact-2D: A Physical Design Methodology to Build Commercial-Quality Face-to-Face-Bonded 3D ICs. ISPD 2018: 90-97 - [c8]Md Musabbir Adnan, Sagarvarma Sayyaparaju, Garrett S. Rose
A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems. SoCC 2018: 37-42 - 2017
- [c7]Kyungwook Chang, Bon Woong Ku, Saurabh Sinha, Sung Kyu Lim
Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library: (Invited Paper). ICCAD 2017: 1005-1010 - [c6]Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity. ISLPED 2017: 1-6 - [c5]Austin Wyer, Md Musabbir Adnan, Bon Woong Ku, Sung Kyu Lim
Evaluating online-learning in memristive neuromorphic circuits. NCS 2017: 5:1-5:8 - 2016
- [c4]Bon Woong Ku, Peter Debacker, Dragomir Milojevic
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD 2016: 87 - [c3]Bon Woong Ku, Peter Debacker, Dragomir Milojevic
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED 2016: 76-81 - [c2]Kartik Acharya, Kyungwook Chang, Bon Woong Ku, Shreepad Panth, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
Monolithic 3D IC design: Power, performance, and area impact at 7nm. ISQED 2016: 41-48 - 2015
- [c1]Yarui Peng
Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM. DAC 2015: 91:1-91:6
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