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Vijay Kumar Sharma
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2020 – today
- 2024
- [j30]Shams-Ul-Haq, Vijay Kumar Sharma
:
Improved Stability for Robust and Low-Power SRAM Cell Using FinFET Technology. J. Circuits Syst. Comput. 33(6): 2450106:1-2450106:26 (2024) - [j29]Shams-Ul-Haq
FinFET-Based Low-Power Improved PDP 4:2 Approximate Compressor Design. J. Circuits Syst. Comput. 33(14): 2450253:1-2450253:28 (2024) - [j28]Jyoti Khandelwal, Vijay Kumar Sharma:
Correction to: W-VDSR: wavelet-based secure image transmission using machine learning VDSR neural network. Multim. Tools Appl. 83(28): 72177 (2024) - [j27]Jyoti Khandelwal, Vijay Kumar Sharma
Strengthening wavelet based image steganography using Rubik's cube segmentation and secret image scrambling. Multim. Tools Appl. 83(33): 78797-78825 (2024) - [j26]Vijay Kumar Sharma
Enablers Driving Success of Artificial Intelligence in Business Performance: A TISM-MICMAC Approach. IEEE Trans. Engineering Management 71: 4665-4675 (2024) - 2023
- [j25]Vijay Kumar Sharma:
Parity Generators for Nanocommunication Systems Using QCA Nanotechnology. Period. Polytech. Electr. Eng. Comput. Sci. 67(2): 229-237 (2023) - [j24]Vijay Kumar Sharma, Namita Mittal, Ankit Vidyarthi
Semantic morphological variant selection and translation disambiguation for cross-lingual information retrieval. Multim. Tools Appl. 82(6): 8197-8212 (2023) - [j23]Jyoti Khandelwal
W-VDSR: wavelet-based secure image transmission using machine learning VDSR neural network. Multim. Tools Appl. 82(27): 42147-42172 (2023) - [j22]Vijay Kumar Sharma, Jyoti Khandelwal, Sunita Singhal:
Identification of Best Image Scrambling and Descrambling Method for Image Steganography. Multim. Tools Appl. 82(29): 45659-45678 (2023) - [j21]Vijay Kumar Sharma:
Parity generators in QCA nanotechnology for nanocommunication systems. Nano Commun. Networks 36: 100440 (2023) - 2022
- [j20]Vijay Kumar Sharma
CNTFET Circuit-Based Wide Fan-In Domino Logic for Low Power Applications. J. Circuits Syst. Comput. 31(2): 2250036:1-2250036:23 (2022) - [j19]Kajal, Vijay Kumar Sharma:
An efficient low power method for FinFET domino OR logic circuit. Microprocess. Microsystems 95: 104719 (2022) - [j18]Vijay Kumar Sharma
Hilbert quantum image scrambling and graph signal processing-based image steganography. Multim. Tools Appl. 81(13): 17817-17830 (2022) - 2021
- [j17]Sadat Riyaz
Multioperative reversible gate design with implementation of 1-bit full adder and subtractor along with energy dissipation analysis. Int. J. Circuit Theory Appl. 49(4): 990-1012 (2021) - [j16]Vijay Kumar Sharma
A Novel Low Power Technique for FinFET Domino OR Logic. J. Circuits Syst. Comput. 30(7): 2150117:1-2150117:24 (2021) - [j15]Kajal, Vijay Kumar Sharma:
Design and Simulation for NBTI Aware Logic Gates. Wirel. Pers. Commun. 120(2): 1525-1542 (2021) - 2020
- [j14]Vijay Kumar Sharma
A daubechies DWT based image steganography using smoothing operation. Int. Arab J. Inf. Technol. 17(2): 154-161 (2020)
2010 – 2019
- 2019
- [j13]Vijay Kumar Sharma
Visual object tracking based on discriminant DCT features. Digit. Signal Process. 95 (2019) - [c6]Vijay Kumar Sharma:
Designing of Standard Cell Library for GBONOR Approach. ACOMP 2019: 147-151 - 2018
- [j12]Vijay Kumar Sharma, Namita Mittal
An Improvement in Statistical Machine Translation in Perspective of Hindi-English Cross-Lingual Information Retrieval. Computación y Sistemas 22(4) (2018) - [j11]Vijay Kumar Sharma
Visual object tracking based on sequential learning of SVM parameter. Digit. Signal Process. 79: 102-115 (2018) - [j10]Vijay Kumar Sharma
Efficient image steganography using graph signal processing. IET Image Process. 12(6): 1065-1071 (2018) - 2017
- [j9]Vijay Kumar Sharma:
Design of Low Leakage PVT Variations Aware CMOS Bootstrapped Driver Circuit. J. Circuits Syst. Comput. 26(9): 1750137:1-1750137:19 (2017) - [j8]Vijay Kumar Sharma
MIL based visual object tracking with kernel and scale adaptation. Signal Process. Image Commun. 53: 51-64 (2017) - [c5]Vijay Kumar Sharma
Named Entity Identification Based Translation Disambiguation Model. PReMI 2017: 365-372 - 2016
- [j7]Vijay Kumar Sharma
Iterative and Fully Pipelined High Throughput Efficient Architectures of AES in FPGA and ASIC. J. Circuits Syst. Comput. 25(5): 1650049:1-1650049:29 (2016) - [j6]Vijay Kumar Sharma, Manisha Pattanaik:
Design of Low Leakage Variability Aware ONOFIC CMOS Standard Cell Library. J. Circuits Syst. Comput. 25(11): 1650134:1-1650134:16 (2016) - [c4]Vijay Kumar Sharma, Namita Mittal
Exploring Bilingual Word Vectors for Hindi-English Cross-Language Information Retrieval. ICIA 2016: 28:1-28:4 - 2014
- [j5]Vijay Kumar Sharma, Manisha Pattanaik:
Techniques for Low Leakage nanoscale VLSI Circuits: a Comparative Study. J. Circuits Syst. Comput. 23(5) (2014) - [j4]Vijay Kumar Sharma
Non-Recursive Computation of 8 × 8 2D DCT for High accuracy and low Area. J. Circuits Syst. Comput. 23(10) (2014) - [j3]Vijay Kumar Sharma, Manisha Pattanaik:
Process, Voltage and Temperature Variations Aware Low Leakage Approach for Nanoscale CMOS Circuits. J. Low Power Electron. 10(1): 45-52 (2014) - [j2]Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj
PVT variations aware low leakage INDEP approach for nanoscale CMOS circuits. Microelectron. Reliab. 54(1): 90-99 (2014) - [j1]Vijay Kumar Sharma, Sumit Patel, Manisha Pattanaik:
High Performance Process Variations Aware Technique for Sub-threshold 8T-SRAM Cell. Wirel. Pers. Commun. 78(1): 57-68 (2014) - 2013
- [c3]Basant Agarwal
Sentiment classification of review documents using phrase patterns. ICACCI 2013: 1577-1580 - 2012
- [c2]Rohit Kumar Jain, Vijay Kumar Sharma
A new approach for high performance and efficient design of CORDIC processor. RAIT 2012: 756-760 - 2011
- [c1]Anup Sarma, Soubhagya Sutar, Vijay Kumar Sharma
An ASIP for image enhancement applications in spatial domain using LISA. ReTIS 2011: 175-179
Coauthor Index
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last updated on 2024-10-23 20:34 CEST by the dblp team
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